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公开(公告)号：US20220029865A1
公开(公告)日：2022-01-27
申请号：US17186897
申请日：2021-02-26
Applicant: INPHI CORPORATION
Inventor： Todd ROPE , Ilya LYUBOMIRSKY , Whay Sing LEE , Arash FARHOODFAR
IPC: H04L25/03 , H04B10/079 , G06N20/00
Abstract: Embodiments address optimization of an electrical interface between an optical host device and an optical module device at installation time. Certain methods try each entry in a set of Finite Impulse Response (FIR) filter settings at the host transmitter, while asking the module to measure the signal integrity for each. The module will then provide an indication of which entry was the best choice for signal integrity in the current hardware configuration. Note that for the module to host electrical interface, this same technique can be used in reverse, whereby the host asks the module to configure its transmitting FIR filter, and the host records and keeps track of which filter setting is the best, and then configures the module with that filter setting. In both cases, for modules supporting CMIS (Common Management Interface Specification) for module configuration and control, methods are provided.
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公开(公告)号：US20200244561A1
公开(公告)日：2020-07-30
申请号：US16848597
申请日：2020-04-14
Applicant: Inphi Corporation
Inventor： Jamal RIANI , Arash FARHOODFAR , Sudeep BHOJA , Tarun SETYA
Abstract: The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide a retimer module that includes plurality of communication lanes for interfacing with a host system and a line system. The retimer module includes a link monitor and cross point sections. The retimer also includes a management interface module. There are other embodiments as well.
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公开(公告)号：US20200186256A1
公开(公告)日：2020-06-11
申请号：US16790463
申请日：2020-02-13
Applicant: INPHI CORPORATION
Inventor： Benjamin P. SMITH , Jamal RIANI , Sudeep BHOJA , Arash FARHOODFAR , Vipul BHATT
IPC: H04B10/58 , H04B10/00 , H04B10/516 , H04B10/69 , H04B10/54 , H04B10/2507
Abstract: A circuit and method for mitigating multi-path interference in direct detection optical systems is provided. Samples of an optical signal having a pulse amplitude modulated (PAM) E-field are processed by generating a PAM level for each sample. For each sample, the sample is subtracted from the respective PAM level to generate a corresponding error sample. The error samples are lowpass filtered to produce estimates of multi-path interference (MPI). For each sample, one of the estimates of MPI is combined with the sample to produce an interference-mitigated sample.
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公开(公告)号：US20200014407A1
公开(公告)日：2020-01-09
申请号：US16575236
申请日：2019-09-18
Applicant: INPHI CORPORATION
Inventor： Benjamin SMITH , Arash FARHOODFAR , Stewart CROZIER , Frank R. KSCHISCHANG , Andrew HUNT
Abstract: For some applications such as high-speed communication over short-reach links, the complexity and associated high latency provided by existing modulators may be unsuitable. According to an aspect, the present disclosure provides a modulator that can reduce latency for applications such as 40G/100G communication over copper cables or SMF. The modulator has a symbol mapper for mapping a bit stream into symbols, and a multi-level encoder including an inner encoder and an outer encoder for encoding only a portion of the bit stream. In some implementations, the multi-level encoder is configured such that an information block size of the inner encoder is small and matches a field size of the outer encoder. Therefore, components that would be used to accommodate larger block sizes can be omitted. The effect is that complexity and latency can be reduced. According to another aspect, the present disclosure provides a demodulator that is complementary to the modulator.
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公开(公告)号：US20190158189A1
公开(公告)日：2019-05-23
申请号：US16259760
申请日：2019-01-28
Applicant: INPHI CORPORATION
Inventor： Benjamin P. SMITH , Jamal RIANI , Sudeep BHOJA , Arash FARHOODFAR , Vipul BHATT
IPC: H04B10/58 , H04B10/2507 , H04B10/69 , H04B10/516 , H04B10/54
Abstract: A circuit and method for mitigating multi-path interference in direct detection optical systems is provided. Samples of an optical signal having a pulse amplitude modulated (PAM) E-field are processed by generating a PAM level for each sample. For each sample, the sample is subtracted from the respective PAM level to generate a corresponding error sample. The error samples are lowpass filtered to produce estimates of multi-path interference (MPI). For each sample, one of the estimates of MPI is combined with the sample to produce an interference-mitigated sample.
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Patent Agency Ranking
公开(公告)号：US20190044653A1
公开(公告)日：2019-02-07
申请号：US16155610
申请日：2018-10-09
Applicant: INPHI CORPORATION
Inventor： Benjamin P. SMITH , Arash FARHOODFAR
IPC: H04L1/00 , H03M13/29 , H04B10/54 , H04B10/532 , H04B10/516 , H04B10/50 , H04B10/69
CPC classification number: H04L1/0044 , H03M13/2906 , H04B10/50 , H04B10/516 , H04B10/5161 , H04B10/532 , H04B10/541 , H04B10/697 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/006 , H04L1/0065
Abstract: An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.
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公开(公告)号：US20190020356A1
公开(公告)日：2019-01-17
申请号：US16134311
申请日：2018-09-18
Applicant: INPHI CORPORATION
Inventor： Arash FARHOODFAR , Frank R. KSCHISCHANG , Benjamin P. SMITH , Andrew HUNT
CPC classification number: H03M13/2778 , H03M13/2707 , H03M13/271 , H03M13/2742 , H03M13/2757 , H03M13/2767 , H03M13/2782 , H03M13/6502 , H04L1/0071
Abstract: Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations.
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公开(公告)号：US20180302108A1
公开(公告)日：2018-10-18
申请号：US16011483
申请日：2018-06-18
Applicant: INPHI CORPORATION
Inventor： Benjamin SMITH , Arash FARHOODFAR , Stewart CROZIER , Frank R. KSCHISCHANG , Andrew HUNT
CPC classification number: H03M13/2906 , H03M13/1515 , H04L1/0041 , H04L1/0042 , H04L1/0045 , H04L1/0057 , H04L1/006 , H04L1/0063 , H04L1/0065 , H04L25/4917 , H04L27/04
Abstract: For some applications such as high-speed communication over short-reach links, the complexity and associated high latency provided by existing modulators may be unsuitable. According to an aspect, the present disclosure provides a modulator that can reduce latency for applications such as 40G/100G communication over copper cables or SMF. The modulator has a symbol mapper for mapping a bit stream into symbols, and a multi-level encoder including an inner encoder and an outer encoder for encoding only a portion of the bit stream. In some implementations, the multi-level encoder is configured such that an information block size of the inner encoder is small and matches a field size of the outer encoder. Therefore, components that would be used to accommodate larger block sizes can be omitted. The effect is that complexity and latency can be reduced. According to another aspect, the present disclosure provides a demodulator that is complementary to the modulator.
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公开(公告)号：US20180123613A1
公开(公告)日：2018-05-03
申请号：US15337136
申请日：2016-10-28
Applicant: INPHI CORPORATION
Inventor： Andre SZCZEPANEK , Arash FARHOODFAR , Sudeep BHOJA , Sean BATTY , Shaun LYTOLLIS
CPC classification number: H03M13/015 , H03M13/1515 , H03M13/158
Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).
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公开(公告)号：US20210111833A1
公开(公告)日：2021-04-15
申请号：US17127510
申请日：2020-12-18
Applicant: INPHI CORPORATION
Inventor： Benjamin P. SMITH , Arash FARHOODFAR
IPC: H04L1/00 , H04B10/50 , H04B10/516 , H04B10/54 , H03M13/29 , H04B10/532 , H04B10/69
Abstract: An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.
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