公开(公告)号：US20240311151A1

公开(公告)日：2024-09-19

申请号：US18120929

申请日：2023-03-13

Applicant: Intel Corporation

Inventor： Gilles Pokam ,  Andre Seznec ,  Jared Warner Stark, IV ,  Bhargav Reddy Godala

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/48

CPC classification number: G06F9/30047 ,  G06F9/3861 ,  G06F9/4881

Abstract: Techniques and mechanisms for prioritizing entries of a processor resource which is accessed to facilitate the fetching of an instruction for execution. In an embodiment, a first entry of the resource includes, or otherwise corresponds to, a version of the instruction. The first entry is prioritized based on an event wherein the instruction is retired from execution after a front end stall which is due to the instruction. While the first entry is prioritized, the entry is protected from a selection to be evicted from the resource. In another embodiment, second entries of a cache are variously prioritized, based on respective retirement events, to be available for instruction prefetching.

公开(公告)号：US20220207154A1

公开(公告)日：2022-06-30

申请号：US17134333

申请日：2020-12-26

Applicant: Intel Corporation

Inventor： Richard Winterton ,  Mohammad Reza Haghighat ,  Asit Mallick ,  Alaa Alameldeen ,  Abhishek Basak ,  Jason W. Brandt ,  Michael Chynoweth ,  Carlos Rozas ,  Scott Constable ,  Martin Dixon ,  Matthew Fernandez ,  Fangfei Liu ,  Francis McKeen ,  Joseph Nuzman ,  Gilles Pokam ,  Thomas Unterluggauer ,  Xiang Zou

IPC: G06F21/60 ,  H04L9/08 ,  H04L9/30

Abstract: Embodiments for dynamically mitigating speculation vulnerabilities are disclosed. In an embodiment, an apparatus includes a hybrid key generator and memory protection hardware. The hybrid key generator is to generate a hybrid key based on a public key and multiple process identifiers. Each of the process identifiers corresponds to one or more memory spaces in a memory. The memory protection hardware is to use the first hybrid key to protect to the memory spaces.

公开(公告)号：US10191834B2

公开(公告)日：2019-01-29

申请号：US15096141

申请日：2016-04-11

Applicant: Intel Corporation

Inventor： Justin Gottschlich ,  Gilles Pokam ,  Cristiano Pereira ,  Jungwoo Ha

IPC: G06F9/46 ,  G06F11/36 ,  G06F9/48 ,  G06F9/38

Abstract: Methods and systems to identify and reproduce concurrency violations in multi-threaded programs are disclosed. An example method disclosed herein comprises determining whether a condition is met and serializing an operation of a first thread of a multi-threaded program relative to an operation of a second thread of the multi-threaded program. The serialization of the operations of the first and second threads results in a concurrency violation or bug thereby causing the multi-threaded program to crash. In this way, the operations of the first and second threads of the multi-threaded program that are responsible for the concurrency violation are identified and can be revised to remove the bug.

公开(公告)号：US09830196B2

公开(公告)日：2017-11-28

申请号：US14833315

申请日：2015-08-24

Applicant: Intel Corporation

Inventor： Justin E. Gottschlich ,  Cristiano Ligieri Pereira ,  Gilles Pokam ,  Youfeng Wu

IPC: G06F9/52 ,  G06F11/36

CPC classification number: G06F9/52 ,  G06F11/3632

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to manage concurrent predicate expressions. An example method discloses inserting a first condition hook into a first thread, the first condition hook associated with a first condition, inserting a second condition hook into a second thread, the second condition hook associated with a second condition, preventing the second thread from executing until the first condition is satisfied, and identifying a concurrency violation when the second condition is satisfied.