公开(公告)号：US20220021540A1

公开(公告)日：2022-01-20

申请号：US17320762

申请日：2021-05-14

Applicant: Intel Corporation

Inventor： Kapil Sood ,  Naveen Lakkakula ,  Hari K. Tadepalli ,  Lokpraveen Mosur ,  Rajesh Gadiyar ,  Patrick Fleming

IPC: H04L9/32 ,  H04L9/08 ,  H04L29/06 ,  H04L9/14 ,  G06F21/57 ,  G06F21/60

Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.

公开(公告)号：US11018871B2

公开(公告)日：2021-05-25

申请号：US15941407

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Kapil Sood ,  Naveen Lakkakula ,  Hari K. Tadepalli ,  Lokpraveen Mosur ,  Rajesh Gadiyar ,  Patrick Fleming

IPC: H04L29/06 ,  H04L9/32 ,  H04L9/08 ,  H04L9/14 ,  G06F21/57 ,  G06F21/60

Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.

公开(公告)号：US11805116B2

公开(公告)日：2023-10-31

申请号：US16957628

申请日：2018-03-31

Applicant: INTEL CORPORATION

Inventor： Changzheng Wei ,  Weigang Li ,  Danny Y. Zhou ,  Junyuan Wang ,  Hari K. Tadepalli ,  Rashmin N. Patel

IPC: H04W12/04 ,  H04W12/06 ,  H04L9/40 ,  H04W12/00 ,  H04L9/32 ,  G06F21/72

CPC classification number: H04L63/0823 ,  H04L9/3242 ,  H04L63/12 ,  H04W12/009 ,  H04L2463/062

Abstract: Technologies for securing a virtualization network function (VNF) image includes a security server to generate a wrapping cryptographic key to wrap a private key of the VNF image and replace the private key with the wrapped private key to secure the private key. During operation, the VNF image may be authenticated by a network function virtualization (NFV) server as needed. Additionally, the signature of the VNF image may be updated each time the VNF image is shutdown to ensure the continued authenticity of the VNF image.

公开(公告)号：US11537419B2

公开(公告)日：2022-12-27

申请号：US15395884

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Stephen T. Palermo ,  Krishnamurthy Jambur Sathyanarayana ,  Sean Harte ,  Thomas Long ,  Eliezer Tamir ,  Hari K. Tadepalli

IPC: G06F9/455 ,  H04L67/142

Abstract: Disclosed is a source host including a processor. The processor operates a virtual machine (VM) to communicate network traffic over a communication link. The processor also initiates migration of the VM to a destination host. The processor also suspends the VM during migration of the VM to the destination host. The source host also includes a live migration circuit coupled to the processor. The live migration circuit manages a session associated with the communication link while the VM is suspended during migration. The live migration circuit buffers changes to a session state and transfers the buffered session state changes to the destination host for replay after the VM is reactivated on the destination host. The live migration circuit keeps the sessions alive during migration to alleviate connection losses.

公开(公告)号：US20160378715A1

公开(公告)日：2016-12-29

申请号：US14752047

申请日：2015-06-26

Applicant: Intel Corporation

Inventor： Chang Yong Kang ,  Pierre Laurent ,  Hari K. Tadepalli ,  Prasad M. Ghatigar ,  T.J. O'Dwyer ,  Serge Zhilyaev

IPC: G06F15/80

CPC classification number: G06F15/8061 ,  G06F9/30036 ,  G06F9/3814 ,  G06F9/3834 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/3853 ,  G06F9/3867 ,  G06F9/3877 ,  G06F13/16 ,  G06F13/4059

Abstract: Methods and apparatuses relating to tightly-coupled heterogeneous computing are described. In one embodiment, a hardware processor includes a plurality of execution units in parallel, a switch to connect inputs of the plurality of execution units to outputs of a first buffer and a plurality of memory banks and connect inputs of the plurality of memory banks and a plurality of second buffers in parallel to outputs of the first buffer, the plurality of memory banks, and the plurality of execution units, and an offload engine with inputs connected to outputs of the plurality of second buffers.

Abstract translation: 描述了与紧耦合异构计算有关的方法和设备。 在一个实施例中，硬件处理器并行地包括多个执行单元，用于将多个执行单元的输入连接到第一缓冲器和多个存储器组的输出并连接多个存储体的输入的开关和 与第一缓冲器，多个存储体和多个执行单元的输出并联的多个第二缓冲器，以及具有连接到多个第二缓冲器的输出的输入的卸载引擎。