-
公开(公告)号:US20210075732A1
公开(公告)日:2021-03-11
申请号:US16953210
申请日:2020-11-19
Applicant: Intel Corporation
Inventor: Jasvinder Singh , Thomas Long , Eoin Walsh , John J. Browne
IPC: H04L12/851 , H04L12/865 , H04L12/869 , H04L12/863 , H04L12/927
Abstract: In one embodiment, a system comprises an interface to receive a plurality of packets; and a plurality of processor units to execute a plurality of transmission sub-interfaces, each transmission sub-interface to perform hierarchical quality of service (HQoS) scheduling on a distinct subset of the plurality of packets, wherein each transmission sub-interface is to schedule its subset of the plurality of packets for transmission by a network interface controller by assigning the packets of the subset to a plurality of transmission queues that each correspond to a distinct traffic class.
-
公开(公告)号:US20180189087A1
公开(公告)日:2018-07-05
申请号:US15395884
申请日:2016-12-30
Applicant: Intel Corporation
Inventor: Stephen T. Palermo , Krishnamurthy Jambur Sathyanarayana , Sean Harte , Thomas Long , Eliezer Tamir , Hari K. Tadepalli
CPC classification number: G06F9/45558 , G06F2009/4557 , G06F2009/45575 , G06F2009/45595 , H04L67/142
Abstract: Disclosed is a source host including a processor. The processor operates a virtual machine (VM) to communicate network traffic over a communication link. The processor also initiates migration of the VM to a destination host. The processor also suspends the VM during migration of the VM to the destination host. The source host also includes a live migration circuit coupled to the processor. The live migration circuit manages a session associated with the communication link while the VM is suspended during migration. The live migration circuit buffers changes to a session state and transfers the buffered session state changes to the destination host for replay after the VM is reactivated on the destination host. The live migration circuit keeps the sessions alive during migration to alleviate connection losses.
-
公开(公告)号:US20210117224A1
公开(公告)日:2021-04-22
申请号:US17134305
申请日:2020-12-26
Applicant: Intel Corporation
Inventor: Stephen T. Palermo , Krishnamurthy Jambur Sathyanarayana , Sean Harte , Thomas Long , Eliezer Tamir , Hari K. Tadepalli
Abstract: Disclosed is a source host including a processor. The processor operates a virtual machine (VM) to communicate network traffic over a communication link. The processor also initiates migration of the VM to a destination host. The processor also suspends the VM during migration of the VM to the destination host. The source host also includes a live migration circuit coupled to the processor. The live migration circuit manages a session associated with the communication link while the VM is suspended during migration. The live migration circuit buffers changes to a session state and transfers the buffered session state changes to the destination host for replay after the VM is reactivated on the destination host. The live migration circuit keeps the sessions alive during migration to alleviate connection losses.
-
公开(公告)号:US20190045000A1
公开(公告)日:2019-02-07
申请号:US16023733
申请日:2018-06-29
Applicant: Intel Corporation
Inventor: Chetan Hiremath , Timothy Verrall , Andrey Chilikin , Thomas Long , Maryam Tahhan , Eoin Walsh , Andrew Duignan , Rory Browne
IPC: H04L29/08 , H04L12/721
Abstract: Technologies for load-aware traffic steering include a compute device that includes a multi-homed network interface controller (NIC) with a plurality of NICs. The compute device determines a target virtual network function (VNF) of a plurality of VNFs to perform a processing operation on a network packet. The compute device further identifies a first steering point of a first NIC to steer the received network packet to virtual machines (VMs) associated with the target VNF and retrieves a resource utilization metric that corresponds to a usage level of a component of the compute device used by the VMs to process the network packet. Additionally, the compute device determines whether the resource utilization metric indicates a potential overload condition and provides a steering instruction to a second steering point of a second NIC that is usable to redirect the network traffic to the other VMs via the identified second steering point.
-
公开(公告)号:US11537419B2
公开(公告)日:2022-12-27
申请号:US15395884
申请日:2016-12-30
Applicant: Intel Corporation
Inventor: Stephen T. Palermo , Krishnamurthy Jambur Sathyanarayana , Sean Harte , Thomas Long , Eliezer Tamir , Hari K. Tadepalli
IPC: G06F9/455 , H04L67/142
Abstract: Disclosed is a source host including a processor. The processor operates a virtual machine (VM) to communicate network traffic over a communication link. The processor also initiates migration of the VM to a destination host. The processor also suspends the VM during migration of the VM to the destination host. The source host also includes a live migration circuit coupled to the processor. The live migration circuit manages a session associated with the communication link while the VM is suspended during migration. The live migration circuit buffers changes to a session state and transfers the buffered session state changes to the destination host for replay after the VM is reactivated on the destination host. The live migration circuit keeps the sessions alive during migration to alleviate connection losses.
-
-
-
-