Methods and systems to vectorize scalar computer program loops having loop-carried dependences
    11.
    发明授权
    Methods and systems to vectorize scalar computer program loops having loop-carried dependences 有权
    对具有循环携带依赖性的标量计算机程序循环进行矢量化的方法和系统

    公开(公告)号:US09268541B2

    公开(公告)日:2016-02-23

    申请号:US13994062

    申请日:2013-03-15

    Abstract: Methods and systems to convert scalar computer program loops having loop carried dependences to vector computer program loops are disclosed. One example method and system generates a first predicate set associated with a first conditionally executed statement. The first predicate set contains a first set of predicates that cause a variable to be defined in a scalar computer program loop at or before the variable is defined by the first conditionally executed statement. The method and system also generates a second predicate set associated with the first conditionally executed statement. The second predicate set contains a second set of predicates that cause the variable to be used in the scalar computer program loop at or before the variable is defined by the first conditionally executed statement. The method and system determines whether the second predicate set is a subset of the first predicate set and, based on the determination, propagates a vector value in an element of a vector of the variable to a subsequent element of the vector.

    Abstract translation: 公开了将具有循环携带依赖性的标量计算机程序循环转换为向量计算机程序循环的方法和系统。 一个示例性方法和系统生成与第一条件执行语句相关联的第一谓词集合。 第一个谓词集包含第一组谓词,导致在第一个有条件执行的语句定义变量之前或之前,在标量计算机程序循环中定义变量。 方法和系统还生成与第一条件执行语句相关联的第二谓词集合。 第二个谓词集包含第二组谓词,导致在第一个有条件执行的语句定义变量之前或之前在标量计算机程序循环中使用变量。 方法和系统确定第二谓词集是否是第一谓词集的子集,并且基于该确定,将该变量的向量的元素中的向量值传播到向量的后续元素。

    APPARATUS AND METHOD FOR VECTORIZATION WITH SPECULATION SUPPORT
    12.
    发明申请
    APPARATUS AND METHOD FOR VECTORIZATION WITH SPECULATION SUPPORT 有权
    用于带有参数支持的方法的装置和方法

    公开(公告)号:US20140237303A1

    公开(公告)日:2014-08-21

    申请号:US13997664

    申请日:2011-12-23

    CPC classification number: G06F11/0751 G06F9/30018 G06F9/30036 G06F9/30043

    Abstract: An apparatus and method are described for detecting and responding to fault conditions in a processor. For example, one embodiment of a method comprises: reading each active element in succession from a first vector register, each active element specifying an address for a gather or load operation; detecting one or more fault conditions associated with one or more of the active elements; for each active element read in succession prior to a detected fault condition on an element other than the first active element, storing the data loaded from an address associated with the active element in a first output vector register; and for each active element associated with the detected fault condition and following the detected fault condition, setting a bit in an output mask register to indicate the detected fault condition.

    Abstract translation: 描述了用于检测和响应处理器中的故障状况的装置和方法。 例如,一种方法的一个实施例包括:从第一向量寄存器连续读取每个有源元件,每个有源元件指定用于集合或加载操作的地址; 检测与一个或多个所述有源元件相关联的一个或多个故障状况; 对于在除了所述第一有源元件之外的元件的检测到的故障状况之前连续读取的每个有源元件,将从与所述有源元件相关联的地址加载的数据存储在第一输出向量寄存器中; 并且对于与检测到的故障状况相关联的每个有源元件并且跟随检测到的故障状况,设置输出屏蔽寄存器中的位以指示检测到的故障状况。

Patent Agency Ranking