公开(公告)号：US10229866B2

公开(公告)日：2019-03-12

申请号：US15576364

申请日：2015-06-22

Applicant: INTEL CORPORATION

Inventor： Yi Wei Chen ,  Kinyip Phoa ,  Nidhi Nidhi ,  Jui-Yen Lin ,  Kun-Huan Shih ,  Xiaodong Yang ,  Walid M. Hafez ,  Curtis Tsai

IPC: H01L23/48 ,  H01L29/94 ,  H01L21/768 ,  H01L27/06 ,  H01L49/02 ,  H01L27/12

Abstract: Techniques are disclosed for providing on-chip capacitance using through-body-vias (TBVs). In accordance with some embodiments, a TBV may be formed within a semiconductor layer, and a dielectric layer may be formed between the TBV and the surrounding semiconductor layer. The TBV may serve as one electrode (e.g., anode) of a TBV capacitor, and the dielectric layer may serve as the dielectric body of that TBV capacitor. In some embodiments, the semiconductor layer serves as the other electrode (e.g., cathode) of the TBV capacitor. To that end, in some embodiments, the entire semiconductor layer may comprise a low-resistivity material, whereas in some other embodiments, low-resistivity region(s) may be provided just along the sidewalls local to the TBV, for example, by selective doping in those location(s). In other embodiments, a conductive layer formed between the dielectric layer and the semiconductor layer serves as the other electrode (e.g., cathode) of the TBV capacitor.

公开(公告)号：US20190051806A1

公开(公告)日：2019-02-14

申请号：US16074151

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Kinyip Phoa ,  Jui-Yen Lin ,  Nidhi Nidhi ,  Chia-Hong Jan

IPC: H01L35/28 ,  H01L35/14 ,  H01L35/04 ,  H01L29/78

Abstract: An apparatus includes a first semiconductor fin and a second semiconductor fin that is parallel to the first semiconductor fin. The first semiconductor fin extends from a first region of a substrate near a circuit that produces thermal energy when a circuit is in operation to a second region of the substrate, which is disposed away from the circuit. The second semiconductor fin extends from the first region to the second region and has a different material composition than the first semiconductor fin. The first and second semiconductor fins collectively exhibit a Seebeck effect when the circuit is in operation. The apparatus includes interconnects to couple the first and second semiconductor fins to a power supply circuit to transfer electricity generated due to the Seebeck effect to the power supply circuit.