公开(公告)号：US20140310543A1

公开(公告)日：2014-10-16

申请号：US14148530

申请日：2014-01-06

Applicant: Intel Corporation

Inventor： Paul S. Diefenbaugh ,  Robert E. Gough ,  Yuval Bachrach ,  Mikal C. Hunsake ,  Rafi Ben-Tal ,  Ilan Pardo ,  Gideon Prat ,  David J. Harriman

IPC: G06F1/32

CPC classification number: G06F1/325 ,  G06F1/3206 ,  G06F1/3234 ,  G06F1/3278 ,  G06F1/3287 ,  Y02D10/157 ,  Y02D10/171

Abstract: A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.

Abstract translation: 一种降低平台空闲链路功率的方法和装置。 在本发明的一个实施例中，主机及其在平台中的耦合端点各自具有低功率空闲链路状态，其允许在主机及其耦合的端点中禁用高速链路电路。 这允许平台减少其空闲功率，因为​​在本发明的一个实施例中，主机及其耦合端点能够关闭其高速链路电路。