公开(公告)号：US20210006216A1

公开(公告)日：2021-01-07

申请号：US16925948

申请日：2020-07-10

Applicant: Intel Corporation

Inventor： Nicholas P. Cowley ,  Isaac Ali ,  William L. Barber

IPC: H03F3/24 ,  H03G3/30 ,  H03F1/02 ,  H03G3/20

Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

公开(公告)号：US20190260337A1

公开(公告)日：2019-08-22

申请号：US16251476

申请日：2019-01-18

Applicant: Intel Corporation

Inventor： Nicholas P. Cowley ,  Isaac Ali ,  William L. Barber

IPC: H03F3/24 ,  H03G3/30 ,  H03F1/02 ,  H03G3/20

Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

公开(公告)号：US20160309580A1

公开(公告)日：2016-10-20

申请号：US14945762

申请日：2015-11-19

Applicant: Intel Corporation

Inventor： William L. Barber ,  Keith Pinson ,  Andrew P. Collins ,  Boping Wu ,  Isaac Ali ,  Colin L. Perry

IPC: H05K1/02 ,  H01L23/50

CPC classification number: H05K1/0231 ,  H01L23/50 ,  H01L2924/0002 ,  H02H9/04 ,  H05K1/025 ,  H05K2201/09672 ,  H01L2924/00

Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.

公开(公告)号：US09225164B2

公开(公告)日：2015-12-29

申请号：US14534979

申请日：2014-11-06

Applicant: Intel Corporation

Inventor： William L. Barber ,  Keith Pinson ,  Andrew P. Collins ,  Boping Wu ,  Isaac Ali ,  Colin L. Perry

IPC: H02H3/22 ,  H02H9/04 ,  H05K1/02 ,  H01L23/50

CPC classification number: H05K1/0231 ,  H01L23/50 ,  H01L2924/0002 ,  H02H9/04 ,  H05K1/025 ,  H05K2201/09672 ,  H01L2924/00

Abstract: In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.

Abstract translation: 在各种实施例中，公开了可以在去耦组件和用于SoC或MCM的输入端口之间实现多层三维路由的装置和方法。 三维（3D）结构可以提供从去耦组件到输入端口的定义的当前返回路径。 电流返回路径可能被设计约束以向输入端口提供相等且相反的电磁通量，从而减小输入端口和去耦部件之间的串联电感。