公开(公告)号：US11153968B2

公开(公告)日：2021-10-19

申请号：US15841880

申请日：2017-12-14

Applicant: Intel Corporation

Inventor： Jackson Chung Peng Kong ,  Bok Eng Cheah ,  Khang Choong Yong ,  Yun Ling ,  Chia Voon Tan

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

Abstract: Techniques and mechanisms for mitigating the effect of signal noise on communication via an interconnect. In an embodiment, a substrate includes an interconnect and a conductor which has a hole formed therein. Portions of the interconnect variously extend over a side of the conductor, wherein another recess portion of the interconnect extends from a plane which includes the side, and further extends at least partially into the hole. The configuration of the recess portion extending within the hole may contribute to an impedance which dampens a transmitter slew rate of the communication. In an embodiment, a total distance along a path formed by the interconnect is equal to or less than 5.5 inches.

公开(公告)号：US09755334B2

公开(公告)日：2017-09-05

申请号：US14750875

申请日：2015-06-25

Applicant: Intel Corporation

Inventor： Xiang Li ,  Yun Ling ,  Chung-Hao J. Chen ,  Hao-Han Hsu ,  Shyamjith Mohan ,  Kuan-Yu Chen

IPC: H01R12/00 ,  H01R12/70 ,  H01R13/6585 ,  H01R12/79 ,  H01R13/6592 ,  H01R12/77 ,  H01R12/59 ,  H01R12/88

CPC classification number: H01R12/7076 ,  H01R12/594 ,  H01R12/7011 ,  H01R12/774 ,  H01R12/775 ,  H01R12/79 ,  H01R12/88 ,  H01R13/6585 ,  H01R13/6592

Abstract: A retention apparatus for a shielded cable is described. In one embodiment, the apparatus comprises a substrate having a ground; a connector coupled to the substrate; a cable shielded with a conductive material and having an end connectable to the connector to electrically connect with the connector; an electrically conductive material coupled to the ground of the substrate; and a grounding retention mechanism to cause the electrically conductive material to electrically connect the cable to the ground of the substrate by applying a force to the cable shield.

公开(公告)号：US09318850B2

公开(公告)日：2016-04-19

申请号：US14286494

申请日：2014-05-23

Applicant: Intel Corporation

Inventor： Xiang Li ,  Hao-Han Hsu ,  Yun Ling ,  Gong Ouyang ,  Kai Xiao ,  Jiangqi He ,  Lu-Vong T. Phan ,  Wei Xu

IPC: H01R12/00 ,  H01R13/6598 ,  H01R12/72 ,  H05K3/28 ,  H05K3/36 ,  H01R43/18

CPC classification number: H01R13/6598 ,  H01R12/712 ,  H01R12/721 ,  H01R12/724 ,  H01R13/658 ,  H01R43/18 ,  H05K3/284 ,  H05K3/36 ,  Y10T29/49128

Abstract: In an embodiment, a connector such as an edge connector includes a connector housing, a first set of pins configured within the housing and having first ends to couple to corresponding signal lines of a first circuit board and second ends to couple to corresponding signal lines of a mating connector of a second circuit board, and a conductive material adapted to the housing to reduce interference caused by one or more sources of interference. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，诸如边缘连接器的连接器包括连接器壳体，构造在壳体内的第一组引脚，并且具有耦合到第一电路板的相应信号线的第一端和第二端耦合到相应的信号线 第二电路板的配合连接器以及适于壳体的导电材料，以减少由一个或多个干扰源造成的干扰。 描述和要求保护其他实施例。