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公开(公告)号：US20220216182A1
公开(公告)日：2022-07-07
申请号：US17706156
申请日：2022-03-28
申请人： Intel Corporation
IPC分类号： H01L25/065 , H01L23/498 , H01L25/00
摘要： Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.
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公开(公告)号：US20220189861A1
公开(公告)日：2022-06-16
申请号：US17121093
申请日：2020-12-14
申请人： Intel Corporation
发明人： Aleksandar Aleksov , Mohammad Enamul Kabir , Adel A. Elsherbini , Shawna M. Liff , Johanna M. Swan , Feras Eid
IPC分类号： H01L23/498 , H01L23/00 , H01L23/538
摘要： Disclosed herein are microelectronic assemblies including microelectronic components coupled by direct bonding, and related structures and techniques. In some embodiments, a microelectronic assembly may include a first microelectronic component including a first guard ring extending through at least a portion of a thickness of and along a perimeter; a second microelectronic component including a second guard ring extending through at least a portion of a thickness of and along a perimeter, where the first and second microelectronic components are coupled by direct bonding; and a seal ring formed by coupling the first guard ring to the second guard ring. In some embodiments, a microelectronic assembly may include a microelectronic component coupled to an interposer that includes a first liner material at a first surface; a second liner material at an opposing second surface; and a perimeter wall through the interposer and connected to the first and second liner materials.
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公开(公告)号：US11348882B2
公开(公告)日：2022-05-31
申请号：US16683125
申请日：2019-11-13
申请人： Intel Corporation
IPC分类号： H01L23/60 , H01L23/498 , H01L23/053 , H01L23/00
摘要： Embodiments may relate to a microelectronic package with an electrostatic discharge (ESD) protection structure within the package substrate. The ESD protection structure may include a cavity that has a contact of a signal line and a contact of a ground line positioned therein. Other embodiments may be described or claimed.
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公开(公告)号：US11336559B2
公开(公告)日：2022-05-17
申请号：US16106926
申请日：2018-08-21
申请人： Intel Corporation
IPC分类号： H04L45/122 , H04L45/12 , H04L9/40 , G06F12/0842 , H04L49/109
摘要： Embodiments herein may relate to a processor package with a substrate and a multi-chip processor coupled with the substrate. The multi-chip processor may include a dual-sided interconnect structure coupled with a first chip, a second chip, and a third chip. The first chip may be communicatively coupled with the second chip by an on-chip communication route. Likewise, the second chip may be communicatively coupled with the first chip by an on-chip communication route. Additionally, the first chip may be communicatively coupled with the third chip by a fast-lane communication route. Other embodiments may be described and/or claimed.
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公开(公告)号：US11335663B2
公开(公告)日：2022-05-17
申请号：US16648354
申请日：2017-12-29
申请人： Intel Corporation
摘要： Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface, and a die secured to the package substrate, wherein the die has a first surface and an opposing second surface, the die has first conductive contacts at the first surface and second conductive contacts at the second surface, and the first conductive contacts are coupled to conductive pathways in the package substrate by first non-solder interconnects.
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公开(公告)号：US11296040B2
公开(公告)日：2022-04-05
申请号：US16721442
申请日：2019-12-19
申请人： INTEL CORPORATION
摘要： Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). For example, in some embodiments, an IC package support may include: a first conductive structure in a dielectric material; a second conductive structure in the dielectric material; and a material in contact with the first conductive structure and the second conductive structure, wherein the material includes a polymer, and the material is different from the dielectric material. The material may act as a dielectric material below a trigger voltage, and as a conductive material above the trigger voltage.
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公开(公告)号：US20220093561A1
公开(公告)日：2022-03-24
申请号：US17025709
申请日：2020-09-18
申请人： Intel Corporation
IPC分类号： H01L25/065 , H01L23/00
摘要： Disclosed herein are microelectronic assemblies including direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first subregion and a second subregion, and the first subregion has a greater metal density than the second subregion. In some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first metal contact and a second metal contact, the first metal contact has a larger area than the second metal contact, and the first metal contact is electrically coupled to a power/ground plane of the first microelectronic component.
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公开(公告)号：US20220093546A1
公开(公告)日：2022-03-24
申请号：US17025181
申请日：2020-09-18
申请人： Intel Corporation
发明人： Adel A. Elsherbini , Krishna Bharath , Kevin P. O'Brien , Kimin Jun , Han Wui Then , Mohammad Enamul Kabir , Gerald S. Pasdast , Feras Eid , Aleksandar Aleksov , Johanna M. Swan , Shawna M. Liff
IPC分类号： H01L23/00 , H01L49/02 , H01L25/065
摘要： Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.
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公开(公告)号：US20220093517A1
公开(公告)日：2022-03-24
申请号：US17025166
申请日：2020-09-18
申请人： Intel Corporation
发明人： Aleksandar Aleksov , Adel A. Elsherbini , Shawna M. Liff , Johanna M. Swan , Feras Eid , Randy B. Osborne , Van H. Le
IPC分类号： H01L23/538 , H01L25/065 , H01L23/49
摘要： Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include an interposer, including an organic dielectric material, and a microelectronic component coupled to the interposer by direct bonding.
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公开(公告)号：US11264687B2
公开(公告)日：2022-03-01
申请号：US15972441
申请日：2018-05-07
申请人： Intel Corporation
摘要： Microelectronic assemblies that include a lithographically-defined substrate integrated waveguide (SIW) component, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate portion having a first face and an opposing second face; and an SIW component that may include a first conductive layer on the first face of the package substrate portion, a dielectric layer on the first conductive layer, a second conductive layer on the dielectric layer, and a first conductive sidewall and an opposing second conductive sidewall in the dielectric layer, wherein the first and second conductive sidewalls are continuous structures.
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