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公开(公告)号:US10585464B2
公开(公告)日:2020-03-10
申请号:US16089029
申请日:2016-03-28
Applicant: Intel Corporation
Inventor: Hong W. Wong , Wah Yiu Kwong , Cheong W. Wong , Vivek M. Paranjape , Chia-Hung S. Kuo
Abstract: Systems, apparatuses and methods may provide for a thermal protection apparatus comprising a substrate including surfaces defining one or more channels and an array of openings adjacent to the one or more channels and an outer layer coupled to the substrate. The outer layer may include a plurality of opaque elastic regions positioned adjacent to the array of openings. Additionally, a fluid may be positioned within the one or more channels. In one example, the plurality of opaque elastic regions are expandable to become protrusions including one or more of a rectangular shape, a donut shape or a dome shape.
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12.
公开(公告)号:US20240205372A1
公开(公告)日:2024-06-20
申请号:US18590505
申请日:2024-02-28
Applicant: Intel Corporation
Inventor: Praveen Kashyap Ananta Bhat , Rahul R. , Passant V. Karunaratne , Navya P. , Nagalakshmi Shashidhara Guptha , Venkateshan Udhayan , Tao Tao , Chia-Hung S. Kuo , Balvinder Pal Singh , Stanley Baran , Aiswarya Pious , Michael Rosenzweig
Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to manage video conferencing call data. An example apparatus comprises interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to access input data associated with a first video conferencing device, the first video conferencing device communicatively coupled to a second video conferencing device via a network, generate a representation of the input data when a performance metric corresponding to the network satisfies a threshold value, and transmit the representation to the second video conferencing device via the network.
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公开(公告)号:US20220114136A1
公开(公告)日:2022-04-14
申请号:US17558172
申请日:2021-12-21
Applicant: Intel Corporation
Inventor: Jianfang Zhu , Ivan Chen , Barnes Cooper , Jianwei Dai , Martin Dixon , Kristoffer Fleming , Mark Gallina , Duncan Glendinning , Deepak Samuel Kirubakaran , Chia-Hung S. Kuo , Yifan Li , Adam Norman , Michael Rosenzweig , Kai P Wang , Jin Yan , Virendra Vikramsinh Adsure
Abstract: Methods, systems, and apparatus to reconfigure a computer are disclosed. An example electronic device includes at least one memory, instructions in the electronic device, and processor circuitry to execute instructions to analyze data corresponding to a first configuration of the electronic device to detect a change associated with the electronic device, the first configuration corresponding to a respective first user profile, determine a second configuration of the electronic device based on the detected change, and adjust a configuration of the electronic device from the first configuration to the second configuration.
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公开(公告)号:US20220091644A1
公开(公告)日:2022-03-24
申请号:US17540550
申请日:2021-12-02
Applicant: Intel Corporation
Inventor: Samantha Rao , Zhongsheng Wang , Somvir Singh Dahiya , Chee Lim Nge , Siang Yeong Tan , Chia-Hung S. Kuo
IPC: G06F1/20 , G06F1/3296 , G01R19/165 , G06F1/324
Abstract: A first circuit to receive from a sensor a thermal condition of a voltage regulator while circuitry comprising the voltage regulator is to regulate delivery of power to a power domain having first and second components. The circuitry is to control a first power consumption rate of the first component based on a first parameter and control a second power consumption rate of the second component based on a second parameter. The first circuit monitors the thermal condition and generates an evaluation result based on a test criterion. A second circuit receives from the first circuit a signal based on the evaluation result. Based on the signal, the second circuit is to signal the circuitry to change the first parameter. An amount of any change to the second parameter based on the evaluation result is different than an amount of change to the first parameter based on the evaluation result.
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公开(公告)号:US11237610B2
公开(公告)日:2022-02-01
申请号:US16689644
申请日:2019-11-20
Applicant: Intel Corporation
Inventor: Chia-Hung S. Kuo , Philip Lehwalder , Arik Gihon
Abstract: Described are mechanisms and methods for reducing CPU power upon interruption of a supplied power. In some embodiments, an apparatus may comprise an input to receive an indicator that a supply voltage to a computer system has been interrupted. The apparatus may comprise an output to provide an indicator to reduce a processor power consumption level. The apparatus may also comprise a circuitry to establish the indicator to reduce the processor power level based upon the indicator that the supply voltage to the computer system has been interrupted.
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公开(公告)号:US20210149469A1
公开(公告)日:2021-05-20
申请号:US16689644
申请日:2019-11-20
Applicant: Intel Corporation
Inventor: Chia-Hung S. Kuo , Philip Lehwalder , Arik Gihon
Abstract: Described are mechanisms and methods for reducing CPU power upon interruption of a supplied power. In some embodiments, an apparatus may comprise an input to receive an indicator that a supply voltage to a computer system has been interrupted. The apparatus may comprise an output to provide an indicator to reduce a processor power consumption level. The apparatus may also comprise a circuitry to establish the indicator to reduce the processor power level based upon the indicator that the supply voltage to the computer system has been interrupted.
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17.
公开(公告)号:US10860522B2
公开(公告)日:2020-12-08
申请号:US15600516
申请日:2017-05-19
Applicant: Intel Corporation
Inventor: Tin-Cheung Kung , Chia-Hung S. Kuo , Nivedita Aggarwal
Abstract: A method and system for manages mapping of universal serial bus (USB) connectors to a plurality of USB host controllers. The method determines an enumeration of USB connectors in a system, identifying USB host controllers in the system, generating a grouping for a USB connector with USB host controllers, and configures USB routing in the system to map the USB connector with the USB host controllers according to the grouping.
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公开(公告)号:US20190272236A1
公开(公告)日:2019-09-05
申请号:US16416036
申请日:2019-05-17
Applicant: Intel Corporation
Inventor: Yanru Li , Ali Taha , Chia-Hung S. Kuo
IPC: G06F12/0888 , G06F12/0891
Abstract: Embodiments of the present disclosure relate to an apparatus, comprising a first memory controller, to receive a signal from a component coupled with the first memory controller, where the signal indicates that data is to bypass a volatile memory device coupled with the first memory controller and be written to a byte-addressable write-in-place persistent memory device coupled with the first memory controller; determine, in response to the received signal, whether a write buffer in a second memory controller, coupled with the first memory controller, is empty; direct, if the write buffer is empty, the data to the write buffer for temporary storage prior to storage in the persistent memory device, to bypass the volatile memory device; and direct, if the write buffer is not empty, the data to the volatile memory device.
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公开(公告)号:US12248356B2
公开(公告)日:2025-03-11
申请号:US17359403
申请日:2021-06-25
Applicant: Intel Corporation
Inventor: Virendra Vikramsinh Adsure , Chia-Hung S. Kuo , Robert J. Royer, Jr. , Deepak Gandiga Shivakumar
IPC: G06F1/3293
Abstract: Examples include techniques to reduce memory power consumption during a system idle state. Cores of a single socket multi-core processor may be mapped to different virtual non-uniform memory architecture (NUMA) nodes and a dynamic random access memory (DRAM) may be partitioned into multiple segments that are capable of having self-refresh operations separately deactivated or activated. Different segments from among the multiple segments of DRAM may be mapped to the virtual NUMA nodes to allow for a mechanism to cause memory requests for pinned or locked pages of data to be directed to a given virtual NUMA node.
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公开(公告)号:US12177463B2
公开(公告)日:2024-12-24
申请号:US18193806
申请日:2023-03-31
Applicant: Intel Corporation
Inventor: Venkateshan Udhayan , Kristoffer Fleming , Chia-Hung S. Kuo , Sangeeta Manepalli , Vishal Sinha , Jason Tanner
IPC: H04N19/30 , H04N19/14 , H04N19/164 , H04N19/172
Abstract: A video source device for wireless display sharing, including: an encoder operable to dynamically switch between encoding a video full-frame into a first bitstream at a first resolution, and a video sub-frame into a second bitstream at a second resolution, wherein the second resolution is higher than the first resolution; processing circuitry operable to decide between encoding the video full-frame and encoding the video sub-frame based on an amount of available wireless transmission bandwidth, a number of pixels in a changed region of the video full-frame, spatial complexity of a changed region of the video full-frame, temporal complexity of a changed region of the video full-frame, or a category of region change of the video full-frame; and a transmitter operable to wirelessly transmit the first bitstream and the second bitstream to a video sink device.
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