公开(公告)号：US12117886B2

公开(公告)日：2024-10-15

申请号：US18449890

申请日：2023-08-15

Applicant: INTEL CORPORATION

Inventor： Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Raoul Rivas Toledano ,  Chee Lim Nge ,  Rajshree Chabukswar ,  James Hermerding, II ,  Sudheer Nair ,  William Braun ,  Zhongsheng Wang ,  Russell Fenger ,  Udayan Kapaley

IPC: G06F1/32 ,  G06F1/3228 ,  G06F1/329 ,  G06F9/38 ,  G06F9/48

CPC classification number: G06F1/329 ,  G06F1/3228 ,  G06F9/3836 ,  G06F9/4812 ,  G06F9/4893

Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.

公开(公告)号：US20230385507A1

公开(公告)日：2023-11-30

申请号：US18326772

申请日：2023-05-31

Applicant: Intel Corporation

Inventor： Jianfang Zhu ,  Adam Norman ,  Min Suet Lim ,  Miaomiao Ma ,  Mackenzie Norman ,  John Vu ,  Ching Leong Ooi ,  Eng Same Tan ,  Luis Carlos Alvarez Mata

IPC: G06F30/392 ,  G06F30/27

CPC classification number: G06F30/392 ,  G06F30/27

Abstract: Systems, apparatuses and methods may provide for technology that receives parameter results and scores of one or more local sessions with respect to subcircuit components in a bounded area, aggregates the parameter results and scores, and generates a global placement model based on an output of the aggregated parameter results and scores.

公开(公告)号：US20200326994A1

公开(公告)日：2020-10-15

申请号：US16914177

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Carin Ruiz ,  Bo Qiu ,  Columbia Mishra ,  Arijit Chattopadhyay ,  Chee Lim Nge ,  Srikanth Potluri ,  Jianfang Zhu ,  Deepak Samuel Kirubakaran ,  Akhilesh Rallabandi ,  Mark Gallina ,  Renji Thomas ,  James Hermerding II

IPC: G06F9/50 ,  G06F9/48 ,  G06F11/30

Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.

公开(公告)号：US09985958B2

公开(公告)日：2018-05-29

申请号：US15081883

申请日：2016-03-26

Applicant: Intel Corporation

Inventor： Bo Qiu ,  Jianfang Zhu ,  Anand S. Konanur ,  Bradley A. Jackson ,  Sayan Lahiri

IPC: H02J7/00 ,  H04L29/06 ,  H04W12/06

CPC classification number: H04L63/083 ,  H04W12/06

Abstract: Apparatus, methods, and systems described herein are for segmentation, handshaking, and access control solutions for Opendots technology. One embodiment described a charging pad that includes a plurality of conductive strips, switches, and decipher circuitry. A switch is coupled to the plurality of conductive strips whereas the decipher circuitry is coupled to the plurality of conductive strips and the switch. In response to contact with one conductive strip of the plurality of conductive strips, the decipher circuitry determines whether a security password has been received. The switch allows a voltage higher than a threshold voltage level to be supplied to an external device if the security password is received by the decipher circuitry. However, the switch can also prevent a voltage higher than a threshold voltage level to be supplied to an external device if the security password is not received by the decipher circuitry.

公开(公告)号：US12146476B2

公开(公告)日：2024-11-19

申请号：US17561605

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Jeff Ku ,  Mark J. Gallina ,  Min Suet Lim ,  Jianfang Zhu

IPC: H05K7/20 ,  F03G7/06

Abstract: Particular embodiments described herein provide for a flexible vapor chamber with shape memory material for an electronic device. In an example, the electronic device can include a flexible vapor chamber and shape memory material coupled to the shape memory material. When the shape memory material is activated, the shape memory material moves a portion of the flexible vapor chamber to a position that helps with heat dissipation of heat collected by the flexible vapor chamber.

公开(公告)号：US20220300692A1

公开(公告)日：2022-09-22

申请号：US17835323

申请日：2022-06-08

Applicant: Intel Corporation

Inventor： Jin Yan ,  Adam Norman ,  Min Suet Lim ,  Mackenzie Norman ,  Hong Cheah Ho ,  Jianfang Zhu ,  Miaomiao Ma

IPC: G06F30/392 ,  G06F30/398

Abstract: Systems, apparatuses and methods may provide for technology that identifies a plurality of functional blocks in a circuit, wherein each functional block includes a plurality of components, conducts one or more passes of a first optimization loop to determine candidate aspect ratios for the functional blocks based on size data associated with the components, and conducts, within the one or more passes of the first optimization loop, one or more passes of a second optimization loop to determine candidate floorplan data for the circuit based on the candidate aspect ratios.

公开(公告)号：US11367452B2

公开(公告)日：2022-06-21

申请号：US16765023

申请日：2018-03-02

Applicant: INTEL CORPORATION

Inventor： Fan Chen ,  Bo Qiu ,  Brian E. Woodruff ,  Peter Sankhagowit ,  Yunbiao Lin ,  Wenyi Tang ,  Yongfa Zhou ,  Jianwei Yang ,  Jianfang Zhu ,  Priya Balasubramanian ,  Ashish Singhi ,  Yating Wang ,  Yu Y Yang ,  Areeba Turabi

IPC: G10L19/002 ,  G02B27/00 ,  G02B27/01 ,  G06F3/01 ,  G06T19/00 ,  H04R3/00 ,  H04R3/04 ,  H04R5/033 ,  H04R5/04 ,  H04S1/00 ,  H04S7/00

Abstract: Techniques are provided for spatial audio streaming using adaptive bitrate encoding and decoding in bandwidth limited virtual reality applications. A methodology implementing the techniques according to an embodiment includes calculating weight factors for audio channels associated with each of a plurality of microphones. The weight factors are based on the position and head angle, relative to the microphones, of a user wearing a head mounted display (HMD). The method also includes encoding and decoding the audio channels, for transmission to the HMD, at a selected bitrate, the bitrate based on the weight factor for the audio channel. The method further includes applying an adaptive gain compensation to each of the received and decoded audio channels, the gain compensation also based on the weight factor. The method further includes mixing the resulting gain compensated channels to generate a stereo audio signal to be played through speakers of the HMD.

公开(公告)号：US10725929B2

公开(公告)日：2020-07-28

申请号：US15483741

申请日：2017-04-10

Applicant: Intel Corporation

Inventor： Jianfang Zhu ,  Cristiano J. Ferreira ,  Bo Qiu ,  Ajit Krisshna Nandyal Lakshman ,  Nikhil Talpallikar ,  Deepak Gandiga Shivakumar ,  Brandt M. Guttridge ,  Kim Pallister ,  Frank J. Soqui ,  Anand Srivatsa ,  Travis T. Schluessler ,  Abhishek R. Appu ,  Ankur N. Shah ,  Joydeep Ray ,  Altug Koker ,  Jonathan Kennedy

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/10 ,  G06F12/0875 ,  G06F12/0811 ,  G06T1/60 ,  G06F3/06 ,  G06F12/06 ,  G06F12/02 ,  G06F12/109

Abstract: An embodiment of an electronic processing system may include an application processor, system memory communicatively coupled to the application processor, a graphics processor communicatively coupled to the application processor, graphics memory communicatively coupled to the graphics processor, and persistent storage media communicatively coupled to the application processor and the graphics processor to store one or more graphics assets, wherein the graphics processor is to access the one or more graphics asset mapped from the persistent storage media. The persistent storage media may include a low latency, high capacity, and byte-addressable nonvolatile memory. The one or more graphics assets may include one or more of a mega-texture and terrain data. Other embodiments are disclosed and claimed.

公开(公告)号：US10606343B2

公开(公告)日：2020-03-31

申请号：US15476988

申请日：2017-04-01

Applicant: Intel Corporation

Inventor： Karthik Veeramani ,  Jianfang Zhu ,  Sayan Lahiri ,  Bo Qiu ,  Bradley A. Jackson ,  Paul S. Diefenbaugh ,  Kim Pallister

IPC: G06T15/00 ,  G06F3/01 ,  G02B27/01 ,  G06F3/042 ,  G06F1/16 ,  G06F3/03

Abstract: An embodiment of a graphics apparatus may include an image generator, and a gesture tracker communicatively coupled to the image generator. The image generator may be configured to generate an image of a virtual input device, the gesture tracker may be configured to determine a position of a user's finger relative to the virtual input device, and the image generator may be further configured to generate an image of a virtual finger based on the determined position of the user's finger relative to the virtual input device. Other embodiments are disclosed and claimed.

公开(公告)号：US20240288928A1

公开(公告)日：2024-08-29

申请号：US18572672

申请日：2021-11-30

Applicant: Intel Corporation

Inventor： Patrick Leung ,  Jiancheng Tao ,  Trevor Love ,  Jianfang Zhu ,  Kristoffer Fleming ,  Jun Liu ,  Michael Mallen ,  Duncan Glendinning

IPC: G06F1/3296

CPC classification number: G06F1/3296

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that improve sleep state demotion with a hardware power monitor. An example apparatus includes memory, and processor circuitry to perform at least one of the operations to instantiate: detector circuitry to detect power output data of the computing device via a hardware power monitor, power analyzer circuitry to determine the power output data for sleep states of the computing device based on multiple wake intervals, identifier circuitry to identify crossover thresholds at ones of the multiple wake intervals, and controller circuitry to limit the computing device to the crossover thresholds at ones of the multiple wake intervals.