公开(公告)号：US20150364486A1

公开(公告)日：2015-12-17

申请号：US14835922

申请日：2015-08-26

Applicant: Intel Corporation

Inventor： Randy J. Koval

IPC: H01L27/115 ,  H01L29/788 ,  H01L29/49 ,  H01L29/04 ,  H01L29/16

CPC classification number: H01L21/28273 ,  G11C16/0408 ,  G11C2213/71 ,  H01L21/02148 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/31111 ,  H01L21/32133 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11556 ,  H01L29/04 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/4916 ,  H01L29/7827 ,  H01L29/7883 ,  H01L29/7889

Abstract: A memory device or electronic system may include a memory cell body extending from a substrate, a self-aligned floating gate separated from the memory cell body by a tunneling dielectric film, and a control gate separated from the self-aligned floating gate by a blocking dielectric film. The floating gate is flanked by the memory cell body and the control gate to form a memory cell, and the self-aligned floating gate is at least as thick as the control gate. Methods for building such a memory device are also disclosed.

公开(公告)号：US08878279B2

公开(公告)日：2014-11-04

申请号：US13711974

申请日：2012-12-12

Applicant: Intel Corporation

Inventor： Randy J. Koval

IPC: H01L29/788 ,  H01L21/28 ,  G11C16/04

CPC classification number: H01L21/28273 ,  G11C16/0408 ,  G11C2213/71 ,  H01L21/02148 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/31111 ,  H01L21/32133 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11556 ,  H01L29/04 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/4916 ,  H01L29/7827 ,  H01L29/7883 ,  H01L29/7889

Abstract: A memory device or electronic system may include a memory cell body extending from a substrate, a self-aligned floating gate separated from the memory cell body by a tunneling dielectric film, and a control gate separated from the self-aligned floating gate by a blocking dielectric film. The floating gate is flanked by the memory cell body and the control gate to form a memory cell, and the self-aligned floating gate is at least as thick as the control gate. Methods for building such a memory device are also disclosed.

Abstract translation: 存储器件或电子系统可以包括从衬底延伸的存储单元主体，通过隧道电介质膜与存储器单元主体分离的自对准浮动栅极，以及通过阻塞与自对准浮动栅极分离的控制栅极 电介质膜。 浮动栅极侧面是存储单元体和控制栅极，以形成存储单元，并且自对准浮置栅极至少与控制栅极一样厚。 还公开了构建这种存储器件的方法。