公开(公告)号：US11526205B2

公开(公告)日：2022-12-13

申请号：US15734820

申请日：2018-12-31

Applicant: Intel Corporation

Inventor： Ke Han ,  Mingqiu Sun ,  Dong Wang ,  Prakash Iyer ,  Stephan Jourdan ,  Andrzej Mialkowski

IPC: G06F1/32 ,  G06F9/48 ,  G06F1/329 ,  G06F1/3296

Abstract: Methods and apparatus to implement always-on context sensor hubs for processing multiple different types of data inputs are disclosed. An examples apparatus includes a first processor core to implement a host controller, and a second processor core to implement an offload engine. The host controller includes first logic to process sensor data associated with an electronic device when the electronic device is in a low power mode. The host controller is to offload a computational task associated with the sensor data to the offload engine. The offload engine includes second logic to execute the computational task.

公开(公告)号：US20210232199A1

公开(公告)日：2021-07-29

申请号：US15734820

申请日：2018-12-31

Applicant: Intel Corporation

Inventor： Ke Han ,  Mingqiu Sun ,  Dong Wang ,  Prakash Iyer ,  Stephan Jourdan ,  Andrzej Mialkowski

IPC: G06F1/329 ,  G06F1/3296 ,  G06F9/48

Abstract: Methods and apparatus to implement always-on context sensor hubs for processing multiple different types of data inputs are disclosed. An examples apparatus includes a first processor core to implement a host controller, and a second processor core to implement an offload engine. The host controller includes first logic to process sensor data associated with an electronic device when the electronic device is in a low power mode. The host controller is to offload a computational task associated with the sensor data to the offload engine. The offload engine includes second logic to execute the computational task.

公开(公告)号：US20180232039A1

公开(公告)日：2018-08-16

申请号：US15951290

申请日：2018-04-12

Applicant: Intel Corporation

Inventor： Stephen H. Gunther ,  Edward A. Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Michael Cornaby

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296

Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.

公开(公告)号：US09841803B2

公开(公告)日：2017-12-12

申请号：US14689175

申请日：2015-04-17

Applicant: Intel Corporation

Inventor： Stephen H. Gunther ,  Edward A. Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Michael Cornaby

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296

Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.