公开(公告)号：US20250098260A1

公开(公告)日：2025-03-20

申请号：US18370287

申请日：2023-09-19

Applicant: Intel Corporation

Inventor： Guowei XU ,  Feng ZHANG ,  Chiao-Ti HUANG ,  Robin CHAO ,  Tao CHU ,  Chung-Hsun LIN ,  Oleg GOLONZKA ,  Yang ZHANG ,  Ting-Hsiang HUNG ,  Chia-Ching LIN ,  Anand S. MURTHY

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/49 ,  H01L29/775

Abstract: Integrated circuit structures having patch spacers, and methods of fabricating integrated circuit structures having patch spacers, are described. For example, an integrated circuit structure includes a stack of horizontal nanowires. A gate structure is vertically around the stack of horizontal nanowires, the stack of horizontal nanowires extending laterally beyond the gate structure. An internal gate spacer is between vertically adjacent ones of the stack of horizontal nanowires and laterally adjacent to the gate structure. An external gate spacer is along sides of the gate structure and over the stack of horizontal nanowires, the external gate spacer having one or more patch spacers therein.