-
公开(公告)号：US20170278916A1
公开(公告)日：2017-09-28
申请号：US15426606
申请日：2017-02-07
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
IPC: H01L27/32
CPC classification number: H01L27/3262 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L27/1262 , H01L27/3265 , H01L27/3276 , H01L29/66757 , H01L29/66969 , H01L29/78675 , H01L29/7869 , H01L2227/323
Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.
-
公开(公告)号：US20230354647A1
公开(公告)日：2023-11-02
申请号：US18347778
申请日：2023-07-06
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
IPC: H10K59/121 , H01L27/12 , H10K59/131
CPC classification number: H10K59/1213 , H01L27/1259 , H01L27/1251 , H10K59/131 , H10K59/1216 , H01L27/1225 , H01L27/1255 , H01L27/0688
Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.
-
公开(公告)号：US20220310735A1
公开(公告)日：2022-09-29
申请号：US17839864
申请日：2022-06-14
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.
-
Patent Agency Ranking
公开(公告)号：US20210083029A1
公开(公告)日：2021-03-18
申请号：US17109369
申请日：2020-12-02
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between. a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.
-
公开(公告)号：US20200335725A1
公开(公告)日：2020-10-22
申请号：US16922236
申请日：2020-07-07
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
Abstract: The display device includes a substrate including a first resin layer, a second resin layer overlapping the first resin layer, and a first inorganic insulating layer between the first resin layer and the second resin layer, and having flexibility, a display region provided on the substrate, a terminal region arranged outside the display region on the substrate, and a bending region arranged between the display region and the terminal region. A thickness of the second resin layer is larger than a thickness of the first resin layer. The substrate includes a first region and a second region. The first resin layer, the first inorganic insulating layer, and the second resin layer are laminated in the first region. The first resin layer and the second resin layer are laminated in the second region and the first inorganic insulating layer is not laminated in the second region.
-
公开(公告)号：US20190165071A1
公开(公告)日：2019-05-30
申请号：US16263635
申请日：2019-01-31
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
IPC: H01L27/32
Abstract: A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.
-
公开(公告)号：US20180090695A1
公开(公告)日：2018-03-29
申请号：US15682649
申请日：2017-08-22
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
CPC classification number: H01L51/0094 , H01L27/12 , H01L27/1225 , H01L27/1255 , H01L27/3248 , H01L27/3262 , H01L27/3265 , H01L51/0512 , H01L51/5012
Abstract: A display device having an improved display characteristics and reduced manufacturing cost is provided. The display device includes a plurality of pixels arranged on a surface of a substrate. The plurality of pixels each include: a light-emitting element; a driving transistor; a selecting transistor; and a retention capacitor. The driving transistor has a bottom-gate structure. The driving transistor has a semiconductor layer containing a first semiconductor. The retention capacitor has a first electrode and a second electrode. The first electrode doubles as a gate of the driving transistor. The second electrode is disposed at a lower layer than the first electrode and contains a second semiconductor.
-
公开(公告)号：US20170287998A1
公开(公告)日：2017-10-05
申请号：US15468939
申请日：2017-03-24
Applicant: Japan Display Inc.
Inventor： Satoshi MARUYAMA
CPC classification number: H01L27/3262 , H01L27/1222 , H01L27/124 , H01L27/3248 , H01L29/78624 , H01L29/78645 , H01L51/56
Abstract: An organic EL display device includes a plurality of pixels and a transistor in each of the pixels. The transistor includes a drain electrode and a source electrode. A first gate electrode formed between the source electrode and the drain electrode, and a semiconductor film formed at a lower layer side of the first gate electrode. A first region that is one of a region between the first gate electrode and the drain electrode and a region between the first gate electrode and the source electrode of the semiconductor film has a high density of n-type ions and a second region that is the other one of the region between the first gate electrode and the drain electrode and the region between the first gate electrode and the source electrode of the semiconductor film has a low density of n-type ions.
-
-
-
-
-
-
-
Search Results
18
records
(took 0.014 seconds)
