公开(公告)号：US11409442B2

公开(公告)日：2022-08-09

申请号：US17124954

申请日：2020-12-17

Applicant: KIOXIA CORPORATION

Inventor： Junji Yano ,  Hidenori Matsuzaki ,  Kosuke Hatsuda

IPC: G06F3/06 ,  G06F12/02 ,  G06F12/0804 ,  G06F12/0866 ,  G11C29/00 ,  G06F11/07 ,  G06F12/0802 ,  G11C29/04

Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by the host apparatus from the second storing unit to the first storing unit and transfers the data to the host apparatus. The controller includes a management table for managing the number of failure areas in a predetermined unit that occur in the second storing unit and switches, according to the number of failure areas, an operation mode in writing data in the second storing unit from the host apparatus.

公开(公告)号：US12224033B2

公开(公告)日：2025-02-11

申请号：US18178135

申请日：2023-03-03

Applicant: Kioxia Corporation

Inventor： Akira Katayama ,  Kosuke Hatsuda

IPC: G11C7/06 ,  G11C5/06 ,  G11C7/10

Abstract: A memory system according to an embodiment includes a plurality of first wirings, a plurality of second wirings, a memory cell, a third wiring, a sense amplifier, a first switching element, a first transistor including a first terminal connected to a first node and a second terminal connected to a second node, and a control circuit. The first node is positioned further to the side of the sense amplifier than the first switching element. The second node is positioned further to the memory cell than the first switching element. The control circuit is configured to connect the first node and the second node when the first switching element is in an ON state, and connect the first node and the gate terminal of the first transistor when the first switching element is in an OFF state.

公开(公告)号：US11908501B2

公开(公告)日：2024-02-20

申请号：US17462449

申请日：2021-08-31

Applicant: KIOXIA CORPORATION

Inventor： Akira Katayama ,  Kosuke Hatsuda

IPC: G11C11/16

CPC classification number: G11C11/1673

Abstract: A storage device includes a first interconnection, a second interconnection, a memory cell connected between the first and second interconnections and including a variable resistance element and a switching element that is connected in series to the variable resistance element, and a control circuit configured to exercise control of a read operation to read data stored in the memory cell. The control circuit exercises control in such a manner as to set the first interconnection which has been charged with a first voltage and the second interconnection which has been charged with a second voltage into floating states, to set the switching element into an on-state by discharging the second interconnection set into the floating state to thereby increase a voltage applied to the memory cell, and to read the data stored in the memory cell in a state in which the switching element is set into the on-state.

公开(公告)号：US11367475B2

公开(公告)日：2022-06-21

申请号：US17189240

申请日：2021-03-01

Applicant: KIOXIA CORPORATION

Inventor： Yoshiaki Osada ,  Kosuke Hatsuda

IPC: G11C11/16

Abstract: According to one embodiment, a magnetic storage device includes a magnetoresistive element having a first end and a second end. A first switch is between the first end and a first wiring. A second switch is between the second end and a second wiring. A third switch is between the first end and a third wiring. A fourth switch is between the second end and a fourth wiring. A driver is connected to the first wiring and the second wiring and is configured to supply, to the first wiring, a current at a magnitude set based on a voltage at the first end and a voltage at the second end.