公开(公告)号：US20250077101A1

公开(公告)日：2025-03-06

申请号：US18954097

申请日：2024-11-20

Applicant: KIOXIA CORPORATION

Inventor： Yuki SASAKI ,  Shinichi KANNO

IPC: G06F3/06 ,  G06F12/02

Abstract: According to one embodiment, a memory system includes a non-volatile memory and a controller. The controller manages validity of data in the non-volatile memory using a data map. The data map includes first fragment tables. Each of the first fragment tables stores first and second information. The first information indicates the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second information indicates the validity of a plurality of data having a predetermined size in each of entries. The controller selects a write destination block based on a size of write data to be written to the non-volatile memory by a write command from a host.

公开(公告)号：US20230401149A1

公开(公告)日：2023-12-14

申请号：US18457672

申请日：2023-08-29

Applicant: KIOXIA CORPORATION

Inventor： Yuki SASAKI ,  Shinichi KANNO ,  Takahiro KURITA

IPC: G06F12/02 ,  G06F12/1009

CPC classification number: G06F12/0246 ,  G06F12/1009 ,  G06F12/0207 ,  G06F2212/7209 ,  G06F2212/7201 ,  G06F2212/651

Abstract: According to one embodiment, a memory system includes a non-volatile memory and a data map configured to manage validity of data written in the non-volatile memory. The data map includes a plurality of first fragment tables corresponding to a first hierarchy and a second fragment table corresponding to a second hierarchy higher than the first hierarchy. Each of the first fragment tables is used to manage the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second fragment table is used for each of the first fragment tables to manage reference destination information for referencing the first fragment table.

公开(公告)号：US20220300172A1

公开(公告)日：2022-09-22

申请号：US17412028

申请日：2021-08-25

Applicant: Kioxia Corporation

Inventor： Takahiro KURITA ,  Shinichi KANNO ,  Yuki SASAKI

IPC: G06F3/06

Abstract: A memory system may be connected to a host device. The memory system includes a nonvolatile memory and a controller configured to control the nonvolatile memory to reduce an amount of power consumption of the memory system based on a first instruction received from a host device connected to the memory system.

公开(公告)号：US20240241644A1

公开(公告)日：2024-07-18

申请号：US18619262

申请日：2024-03-28

Applicant: Kioxia Corporation

Inventor： Shinichi KANNO ,  Kensaku YAMAGUCHI ,  Takehiko KURASHIGE ,  Yuki SASAKI

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0679

Abstract: According to one embodiment, in response to receiving, from a host, one or more second type commands, a controller of the storage device maintains the received one or more second type commands in a memory region in the storage device without completing processing of the received one or more second type commands. In response to receiving the first type command from the host, the controller completes processing of a second type command, and transmits a command completion response for the first type command to the host as a first preceding response for the first type command. In response to completion of processing of the first type command, the controller transmits a command completion response for the first type command to the host.

公开(公告)号：US20240095163A1

公开(公告)日：2024-03-21

申请号：US18463396

申请日：2023-09-08

Applicant: Kioxia Corporation

Inventor： Shinichi KANNO ,  Aurelien Nam Phong TRAN ,  Yuki SASAKI

IPC: G06F12/02 ,  G06F12/1027

CPC classification number: G06F12/0246 ,  G06F12/1027

Abstract: According to one embodiment, in response to restoration of power to a memory system, a controller in the memory system notifies a host that the memory system is ready. When an input/output command specifying a logical address belonging to a logical address range is received, the controller selects a block corresponding to the logical address range and rebuilds, based on address translation information and an update log which are stored in the selected block, the latest address translation information corresponding to the logical address range. The controller updates the rebuilt latest address translation information, based on a list of logical addresses corresponding to lost write data, stored in the selected block.

公开(公告)号：US20230297262A1

公开(公告)日：2023-09-21

申请号：US17898394

申请日：2022-08-29

Applicant: KIOXIA CORPORATION

Inventor： Yuki SASAKI ,  Shinichi KANNO

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0656 ,  G06F3/0607 ,  G06F3/0679

Abstract: A memory system includes a volatile memory, a nonvolatile memory, and a controller. The controller is configured to set a block group of the nonvolatile memory to be in a writable state and generate in the volatile memory a list associated with the block group. The controller is configured to, with respect to a write command, add an entry to the list, which includes a first address of a host and a second address of the volatile memory, obtain the write data from the first address of the host and store the write data in the second address of the volatile memory, write the write data stored at the second address of the volatile memory into the block group, and upon the block group being fully written, set the block group to be in a non-writable state and dissociate the list from the block group.

公开(公告)号：US20230236730A1

公开(公告)日：2023-07-27

申请号：US17931363

申请日：2022-09-12

Applicant: Kioxia Corporation

Inventor： Shinichi KANNO ,  Kensaku YAMAGUCHI ,  Takehiko KURASHIGE ,  Yuki SASAKI

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0679 ,  G06F3/0659

Abstract: According to one embodiment, in response to receiving, from a host, one or more second type commands, a controller of the storage device maintains the received one or more second type commands in a memory region in the storage device without completing processing of the received one or more second type commands. In response to receiving the first type command from the host, the controller completes processing of a second type command, and transmits a command completion response for the first type command to the host as a first preceding response for the first type command. In response to completion of processing of the first type command, the controller transmits a command completion response for the first type command to the host.

公开(公告)号：US20220404965A1

公开(公告)日：2022-12-22

申请号：US17643611

申请日：2021-12-10

Applicant: Kioxia Corporation

Inventor： Yuki SASAKI ,  Shinichi KANNO

IPC: G06F3/06 ,  G06F12/02

Abstract: According to one embodiment, a memory system includes a non-volatile memory and a controller. The controller manages validity of data in the non-volatile memory using a data map. The data map includes first fragment tables. Each of the first fragment tables stores first and second information. The first information indicates the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second information indicates the validity of a plurality of data having a predetermined size in each of entries. The controller selects a write destination block based on a size of write data to be written to the non-volatile memory by a write command from a host.

公开(公告)号：US20220114090A1

公开(公告)日：2022-04-14

申请号：US17345438

申请日：2021-06-11

Applicant: Kioxia Corporation

Inventor： Yuki SASAKI ,  Shinichi KANNO ,  Takahiro KURITA

IPC: G06F12/02 ,  G06F12/1009

Abstract: According to one embodiment, a memory system includes a non-volatile memory and a data map configured to manage validity of data written in the non-volatile memory. The data map includes a plurality of first fragment tables corresponding to a first hierarchy and a second fragment table corresponding to a second hierarchy higher than the first hierarchy. Each of the first fragment tables is used to manage the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second fragment table is used for each of the first fragment tables to manage reference destination information for referencing the first fragment table.