公开(公告)号：US08401835B2

公开(公告)日：2013-03-19

申请号：US10302083

申请日：2002-11-22

申请人： Manisha Agarwala ,  John M. Johnsen ,  Lewis Nardini

发明人： Manisha Agarwala ,  John M. Johnsen ,  Lewis Nardini

IPC分类号： G06F9/455 ,  G06F11/00

CPC分类号： G06F11/3636

摘要： In the case of tracing processor activity and generating data streams multiple triggers can be generated at the same time. The issue is further complicated in a protected pipeline where certain locations are considered as in illegal instruction boundary. During those cycles certain information is invalid and cannot be transmitted to the user. Thus a received trace trigger cannot begin. This invention resolves all ambiguities related to multiple triggers so that the user has a known predictable behavior based on the setup of the triggers.

摘要翻译： 在跟踪处理器活动和生成数据流的情况下，可以同时生成多个触发器。 这个问题在受保护的管道中进一步复杂化，其中某些位置被视为非法指令边界。 在这些周期中，某些信息是无效的，不能发送给用户。 因此，接收到的跟踪触发器不能开始。 本发明解决了与多个触发相关的所有歧义，使得用户基于触发器的设置具有已知的可预测行为。

公开(公告)号：US07606696B2

公开(公告)日：2009-10-20

申请号：US11566766

申请日：2006-12-05

申请人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

发明人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

IPC分类号： G06F9/455 ,  G06F11/273 ,  G06F11/34 ,  G06F3/00 ,  G06F13/12 ,  G01R13/28

CPC分类号： G06F11/3636 ,  G06F11/3476

摘要： This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace address that do not match the comparison address or are less significant than any section of the current trace address that does not match the comparison address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The comparison address is specified by a central processing unit via a memory mapped register write operation.

摘要翻译： 本发明通过将当前跟踪地址的各个字节与存储的比较地址进行比较来提供跟踪地址压缩。 只有当前跟踪地址中与比较地址不匹配或者比当前跟踪地址与比较地址不匹配的任何部分不太重要的最低有效字节被传送。 这有时会减少需要传输的数据量。 比较地址由中央处理单元通过存储器映射寄存器写入操作指定。

公开(公告)号：US07383367B2

公开(公告)日：2008-06-03

申请号：US11566757

申请日：2006-12-05

申请人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

发明人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

IPC分类号： G06F3/00 ,  G06F13/12 ,  G06F9/455 ,  G06R31/28

CPC分类号： G06F11/3636 ,  G06F11/3476

摘要： This invention provides trace address compression by comparing respective bytes of a current trace address with a stored prior trace address. Only the least significant bytes of the current trace address that do not match the stored prior trace address or are less significant than any section of the current trace address that does not match the stored prior trace address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The prior trace address may be updated with the current trace address if there is a complete mismatch.

摘要翻译： 本发明通过将当前跟踪地址的各个字节与存储的先前跟踪地址进行比较来提供跟踪地址压缩。 只有当前跟踪地址中与存储的先前跟踪地址不匹配或者比当前跟踪地址中与存储的先前跟踪地址不匹配的任何部分不太重要的最低有效字节被传送。 这有时会减少需要传输的数据量。 如果存在完全不匹配，则可以使用当前跟踪地址更新先前的跟踪地址。

公开(公告)号：US20070294590A1

公开(公告)日：2007-12-20

申请号：US11383697

申请日：2006-05-16

申请人： Manisha Agarwala ,  John M. Johnsen ,  Lewis Nardini

发明人： Manisha Agarwala ,  John M. Johnsen ,  Lewis Nardini

IPC分类号： G06F11/00

CPC分类号： G06F11/26

摘要： A system and method of counting event patterns in order to reduce the bandwidth of event data sent to a monitoring computer. The event patterns are output as one or more data packets indicating the event pattern and a number of occurrences of the pattern.

摘要翻译： 计数事件模式的系统和方法，以减少发送到监控计算机的事件数据的带宽。 事件模式作为一个或多个数据分组输出，指示事件模式和模式的出现次数。

公开(公告)号：US07047270B2

公开(公告)日：2006-05-16

申请号：US10301897

申请日：2002-11-22

申请人： Manisha Agarwala ,  John M. Johnsen ,  Lewis Nardini

发明人： Manisha Agarwala ,  John M. Johnsen ,  Lewis Nardini

IPC分类号： G06F7/38

CPC分类号： G06F11/261

摘要： A saturating count counts received event signals up to a first predetermined number. An overflow counter counts overflows up to a second predetermined number. The counter indicates overflow when the overflow count is non-zero and saturates and stops counting at a maximum count when the overflow count reaches the second predetermined number. The counter can be read via a register read operation. The sum of the sum of the first predetermined number of bits and the second predetermined number of bits being an integral multiple of 8 bits.

摘要翻译： 饱和计数将接收的事件信号计数到第一预定数量。 溢出计数器计数溢出到第二预定数量。 当溢出计数达到第二个预定数量时，计数器指示溢出计数不为零并饱和，并以最大计数停止计数。 可以通过寄存器读取操作读取计数器。 第一预定位数和第二预定位数之和为8位的整数倍的总和。

公开(公告)号：US07562170B2

公开(公告)日：2009-07-14

申请号：US11566762

申请日：2006-12-05

申请人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

发明人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

IPC分类号： G06F3/00 ,  G06F13/12 ,  G06F9/455 ,  G06R31/28

CPC分类号： G06F11/3636 ,  G06F11/3476

摘要： This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace address that do not match the comparison address or are less significant than any section of the current trace address that does not match the comparison address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The comparison address is specified by a central processing unit via a memory mapped register write operation.

公开(公告)号：US07171497B2

公开(公告)日：2007-01-30

申请号：US10301969

申请日：2002-11-22

申请人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

发明人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

IPC分类号： G06F3/00 ,  G06F13/12 ,  G06F9/455 ,  G06R31/28

CPC分类号： G06F11/3636 ,  G06F11/3476

摘要： This invention provides trace address compression by comparing respective bytes of a current trace address with a stored prior trace address. Only the least significant bytes of the current trace address that do not match the stored prior trace address or are less significant than any section of the current trace address that does not match the stored prior trace address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The prior trace address may be updated with the current trace address if there is a complete mismatch.

摘要翻译： 本发明通过将当前跟踪地址的各个字节与存储的先前跟踪地址进行比较来提供跟踪地址压缩。 只有当前跟踪地址中与存储的先前跟踪地址不匹配或者比当前跟踪地址中与存储的先前跟踪地址不匹配的任何部分不太重要的最低有效字节被传送。 这有时会减少需要传输的数据量。 如果存在完全不匹配，则可以使用当前跟踪地址更新先前的跟踪地址。

公开(公告)号：US07162552B2

公开(公告)日：2007-01-09

申请号：US10302189

申请日：2002-11-22

申请人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

发明人： Lewis Nardini ,  Manisha Agarwala ,  John M. Johnsen

IPC分类号： G06F3/00 ,  G06F13/12 ,  G06F9/455 ,  G06R31/28

CPC分类号： G06F11/3636 ,  G06F11/3476

摘要： This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace address that do not match the comparison address or are less significant than any section of the current trace address that does not match the comparison address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The comparison address is specified by a central processing unit via a memory mapped register write operation.

摘要翻译： 本发明通过将当前跟踪地址的各个字节与存储的比较地址进行比较来提供跟踪地址压缩。 只有当前跟踪地址中与比较地址不匹配或者比当前跟踪地址与比较地址不匹配的任何部分不太重要的最低有效字节被传送。 这有时会减少需要传输的数据量。 比较地址由中央处理单元通过存储器映射寄存器写入操作指定。

公开(公告)号：US07133821B2

公开(公告)日：2006-11-07

申请号：US10302191

申请日：2002-11-22

申请人： Manisha Agarwala ,  Maria B. H. Gill

发明人： Manisha Agarwala ,  Maria B. H. Gill

IPC分类号： G06F17/50 ,  G06F9/455 ,  G06F11/10

CPC分类号： G06F11/3636 ,  G06F11/3656

摘要： A method of scheduling trace packets in an integrated circuit generating trace packets of plural types stores trace data in respective first-in-first-out buffers. If a timing trace data first-in-first-out buffer is empty, timing trace data packet is transmitted. If a program counter overall data first-in-first-out buffer is not empty and the processor is at a data interruptible boundary, a program counter data packet is transmitted. If data first-in-first-out buffer is not empty, a data packet is transmitted. The program counter data packets include program counter sync data, program counter exception data, program counter relative branch data and program counter absolute branch data.

摘要翻译： 一种在产生多种类型的跟踪分组的集成电路中调度跟踪分组的方法将跟踪数据存储在相应的先进先出缓冲器中。 如果定时跟踪数据先进先出缓冲器为空，则发送定时跟踪数据包。 如果程序计数器的总体数据先进先出缓冲器不为空并且处理器处于数据可中断边界，则发送程序计数器数据分组。 如果数据先进先出缓冲器不为空，则传输数据包。 程序计数器数据包包括程序计数器同步数据，程序计数器异常数据，程序计数器相对分支数据和程序计数器绝对分支数据。

公开(公告)号：US07457739B2

公开(公告)日：2008-11-25

申请号：US11467683

申请日：2006-08-28

申请人： Manisha Agarwala ,  Maria B. H. Gill

发明人： Manisha Agarwala ,  Maria B. H. Gill

IPC分类号： G06F9/455 ,  H03M7/00 ,  G06F11/00

CPC分类号： G06F11/3636 ,  G06F11/3656

摘要： A method of scheduling trace packets in an integrated circuit generating trace packets of plural types stores trace data in respective first-in-first-out buffers. If a timing trace data first-in-first-out buffer is empty, timing trace data packet is transmitted. If a program counter overall data first-in-first-out buffer is not empty and the processor is at a data interruptible boundary, a program counter data packet is transmitted. If data first-in-first-out buffer is not empty, a data packet is transmitted. The program counter data packets include program counter sync data, program counter exception data, program counter relative branch data and program counter absolute branch data.

摘要翻译： 一种在产生多种类型的跟踪分组的集成电路中调度跟踪分组的方法将跟踪数据存储在相应的先进先出缓冲器中。 如果定时跟踪数据先进先出缓冲器为空，则发送定时跟踪数据包。 如果程序计数器的总体数据先进先出缓冲器不为空并且处理器处于数据中断边界，则发送程序计数器数据分组。 如果数据先进先出缓冲器不为空，则传输数据包。 程序计数器数据包包括程序计数器同步数据，程序计数器异常数据，程序计数器相对分支数据和程序计数器绝对分支数据。