公开(公告)号：US20090086104A1

公开(公告)日：2009-04-02

申请号：US11863662

申请日：2007-09-28

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H04N5/268 ,  G06F13/00 ,  H03M1/12

CPC classification number: H04N5/268 ,  H04N5/765 ,  H04N5/775 ,  H04N9/8042

Abstract: In a multimedia SOC that includes a plurality of jack sense modules coupled to the plurality of video output pins, a processing module functions to: enable one or more of the plurality of jack sense modules to determine a video connection to the SOC, enable a video decoder in a first mode when the video connection is of a first type, and enable the video decoder in a second mode when the video connection is of a second type

Abstract translation: 在包括耦合到多个视频输出引脚的多个插孔感测模块的多媒体SOC中，处理模块用于：使得多个插孔感测模块中的一个或多个能够确定到SOC的视频连接，使视频 当视频连接是第一类型时，以第一模式解码器，并且当视频连接是第二类型时，以第二模式启用视频解码器

公开(公告)号：US07104684B2

公开(公告)日：2006-09-12

申请号：US10718769

申请日：2003-11-22

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: G01K7/01 ,  G01K7/16

CPC classification number: G01K7/22 ,  G01K2219/00

Abstract: A system and method for sensing the temperature of a device. This includes the establishment of a programmable current from an on-chip source, which in turn is used to produce a temperature dependent voltage from a temperature dependent resistive device. The temperature dependent resistive device is thermally coupled to a device for which the temperature is to be sensed. The temperature dependent voltage produced is converted to a digital value and equated to the temperature of the device.

Abstract translation: 一种用于感测设备温度的系统和方法。 这包括建立来自片上源的可编程电流，其依次用于从温度依赖性电阻器件产生与温度相关的电压。 温度依赖电阻器件热耦合到要感测温度的器件。 产生的与温度有关的电压转换为数字值，并等于器件的温度。

公开(公告)号：US06373277B1

公开(公告)日：2002-04-16

申请号：US09790282

申请日：2001-02-22

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03K1716

CPC classification number: H04L25/028 ,  H04L25/0272 ,  H04L25/0276 ,  H04L25/0278

Abstract: A line driver having variable impedance termination includes an impedance, a 1st variable feedback, a 2nd variable feedback, a summing module and a gain module. The 1st and 2nd variable feedbacks provide feedback based on the desired impedance for the particular application. The summing module is operably coupled to sum the 1st variable feedback, the 2nd variable feedback and a signal to produce a resultant signal. The gain module is operably coupled to receive the resultant signal and to amplify the signal to produce a gained signal. The output of the gain module is operably coupled to the impedance wherein the other node of the impedance provides the output of the line driver. To provide the feedback, the 1st variable feedback is operably coupled to the output of the gain module and the summing module and the 2nd variable feedback is operably coupled to the output of the line driver and the summing module.

Abstract translation: 具有可变阻抗终端的线路驱动器包括阻抗，第一可变反馈，第二可变反馈，求和模块和增益模块。 第一和第二可变反馈基于特定应用的期望阻抗提供反馈。 求和模块可操作地耦合以将第一可变反馈，第二可变反馈和信号相加以产生结果信号。 增益模块可操作地耦合以接收所得到的信号并放大信号以产生增益信号。 增益模块的输出可操作地耦合到阻抗，其中阻抗的另一个节点提供线路驱动器的输出。 为了提供反馈，第一可变反馈可操作地耦合到增益模块的输出，并且求和模块和第二可变反馈可操作地耦合到线路驱动器和求和模块的输出。

公开(公告)号：US08861749B2

公开(公告)日：2014-10-14

申请号：US13114655

申请日：2011-05-24

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03F21/00 ,  H04H60/04 ,  G06F3/16 ,  G10L21/0208 ,  H04B1/10

CPC classification number: H04H60/04 ,  G06F3/162 ,  G10L21/0208 ,  H04B1/1036

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract translation: 音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。 左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。 右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。 中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。 中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。 左插孔连接可操作地耦合到左通道IC引脚。 右插孔连接可操作地耦合到右通道IC引脚。 耦合到中心反馈IC引脚的插座返回连接。 电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。

公开(公告)号：US20110222712A1

公开(公告)日：2011-09-15

申请号：US13114655

申请日：2011-05-24

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03F99/00 ,  H03G3/00 ,  H03F1/56 ,  H03G3/20

CPC classification number: H04H60/04 ,  G06F3/162 ,  G10L21/0208 ,  H04B1/1036

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract translation: 音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。 左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。 右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。 中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。 中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。 左插孔连接可操作地耦合到左通道IC引脚。 右插孔连接可操作地耦合到右通道IC引脚。 耦合到中心反馈IC引脚的插座返回连接。 电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。

公开(公告)号：US07876911B2

公开(公告)日：2011-01-25

申请号：US11389780

申请日：2006-03-27

Applicant: Matthew D. Felder ,  Matthew Brady Henson

Inventor： Matthew D. Felder ,  Matthew Brady Henson

IPC: H04R1/10

CPC classification number: H04R3/04

Abstract: A headphone driver includes a driver module for generating a plurality of headphone driver signals including a filtered stereo sum signal.

Abstract translation: 耳机驱动器包括用于产生包括滤波后的立体声和信号的多个耳机驱动器信号的驱动器模块。

公开(公告)号：US07580671B2

公开(公告)日：2009-08-25

申请号：US11415826

申请日：2006-05-02

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H04H60/09 ,  H04B1/18

CPC classification number: H04H60/27 ,  G11B27/034 ,  G11B27/105 ,  G11B27/28 ,  G11B27/329 ,  H04H60/43 ,  H04H60/74 ,  H04H2201/13 ,  H04N21/4126

Abstract: A radio record module includes a radio data system (RDS) decoder module that decodes a received RDS signal, that has an associated audio signal, into received RDS data. A memory module stores a record request, the record request having an RDS parameter. A comparison module compares the received RDS data to the RDS parameter of the record request and asserts a record signal when the received RDS data compares favorably to the RDS parameter. A recording module records the associated audio signal in response to the record signal being asserted.

Abstract translation: 无线电记录模块包括无线电数据系统（RDS）解码器模块，其将具有相关音频信号的接收的RDS信号解码为接收的RDS数据。 存储器模块存储记录请求，记录请求具有RDS参数。 比较模块将接收到的RDS数据与记录请求的RDS参数进行比较，并且当接收到的RDS数据与RDS参数相比有利时，它将断言记录信号。 记录模块响应于断言的记录信号来记录相关联的音频信号。

公开(公告)号：US07246027B2

公开(公告)日：2007-07-17

申请号：US11078150

申请日：2005-03-11

Applicant: Marcus W. May ,  Matthew D. Felder

Inventor： Marcus W. May ,  Matthew D. Felder

IPC: G01K1/00

CPC classification number: G06F17/5063

Abstract: A method and apparatus for conserving power of a mixed-signal system-on-a-chip having analog circuitry, involving determination of an analog variation parameter that is representative of an integrated circuit fabrication process variance of the integrated circuit, and an operational temperature associated with the analog variation parameter. With the analog variation parameter and the operational temperature, an adjustment signal is determined for a power supply level of the integrated circuit, such that power consumption of the integrated circuit is optimized. Further, in mixed-signal integrated circuits with digital and analog circuitry, a digital variation parameter is determined, where the adjustment signal determination is based on the digital variation parameter and the analog variation parameter with respect to the operational temperature. With such a method and apparatus, power consumption is optimized on an IC-by-IC basis such that power consumption of each IC is optimized.

Abstract translation: 一种用于节省具有模拟电路的混合信号系统芯片的功率的方法和装置，涉及确定代表集成电路的集成电路制造工艺变化的模拟变化参数以及与该功能相关联的工作温度 具有模拟变化参数。 利用模拟变化参数和操作温度，确定集成电路的电源电平的调整信号，使得集成电路的功耗被优化。 此外，在具有数字和模拟电路的混合信号集成电路中，确定数字变化参数，其中调整信号确定基于数字变化参数和相对于工作温度的模拟变化参数。 利用这样的方法和装置，在逐个IC的基础上优化功率消耗，从而优化每个IC的功耗。

公开(公告)号：US07209069B2

公开(公告)日：2007-04-24

申请号：US11105015

申请日：2005-04-13

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03M1/34

CPC classification number: H03M1/462 ,  H03M1/745

Abstract: A successive approximation Analog-to-Digital Converter (“ADC”) having a successive approximation controller operably coupled to convert a control signal into a digital output of the successive approximation ADC, a current-steered Digital-to-Analog Converter operably coupled to convert the digital output of the successive approximation ADC into an analog feedback signal, and a comparator module operably coupled to compare the analog feedback signal with an analog input of the successive approximation ADC to produce the control signal. A further aspect is a method for increasing accuracy for a digital successive approximation of an analog input signal. The method includes determining a signal characteristic of the analog input signal to an Analog-to-Digital Converter (“ADC”), and selecting a reference voltage source of a Digital-to-Analog Converter of the ADC from a plurality of reference voltage sources based on the analog input signal.

Abstract translation: 具有可操作地耦合以将控制信号转换成逐次逼近ADC的数字输出的逐次逼近控制器的逐次逼近模数转换器（“ADC”），可操作地耦合到转换器的电流转向数字 - 模拟转换器 逐次逼近ADC的数字输出转换为模拟反馈信号，以及可操作地耦合以将模拟反馈信号与逐次逼近ADC的模拟输入进行比较以产生控制信号的比较器模块。 另一方面是用于提高模拟输入信号的数字逐次逼近的精度的方法。 该方法包括确定模拟输入信号到模数转换器（“ADC”）的信号特性，以及从多个参考电压源中选择ADC的数模转换器的参考电压源 基于模拟输入信号。

公开(公告)号：US08014533B2

公开(公告)日：2011-09-06

申请号：US11300236

申请日：2005-12-14

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H04R5/00

CPC classification number: H04H60/04 ,  G06F3/162 ,  G10L21/0208 ,  H04B1/1036

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract translation: 音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。 左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。 右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。 中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。 中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。 左插孔连接可操作地耦合到左通道IC引脚。 右插孔连接可操作地耦合到右通道IC引脚。 耦合到中心反馈IC引脚的插座返回连接。 电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。