公开(公告)号：US09000581B2

公开(公告)日：2015-04-07

申请号：US13896616

申请日：2013-05-17

Applicant: MediaTek Inc.

Inventor： Tai-Yu Chen ,  Chung-Fa Lee ,  Wen-Sung Hsu ,  Shih-Chin Lin

IPC: H01L23/36 ,  H01L23/433 ,  H01L23/498

CPC classification number: H01L23/3736 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board, having a first cross sectional dimension; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; an encapsulant layer, formed over the circuit board, covering the semiconductor chip and surrounding the spacer; a heat spreading layer, formed over the encapsulant layer and the spacer; and a plurality of solder balls, formed over the second surface of the circuit board.

Abstract translation: 提供一种具有降低翘曲问题的半导体封装，包括：具有相对的第一和第二表面的电路板; 半导体芯片，形成在电路板的第一表面的中心部分上，具有第一横截面尺寸; 形成在所述半导体芯片的中心部分上的间隔物，具有小于所述第一横截面尺寸的第二截面尺寸; 形成在电路板上的密封剂层，覆盖半导体芯片并围绕间隔物; 形成在密封剂层和间隔物上的散热层; 以及形成在电路板的第二表面上的多个焊球。