公开(公告)号：US11805645B2

公开(公告)日：2023-10-31

申请号：US16542645

申请日：2019-08-16

Applicant: Micron Technology, Inc.

Inventor： Nicholas R. Tapias ,  Andrew Li ,  Adam W. Saxler ,  Kunal Shrotri ,  Erik R. Byers ,  Matthew J. King ,  Diem Thy N. Tran ,  Wei Yeeng Ng ,  Anish A. Khandekar

IPC: H10B43/27 ,  H01L21/02 ,  H01L21/285 ,  H10B41/27

CPC classification number: H10B43/27 ,  H01L21/0217 ,  H01L21/02164 ,  H01L21/02532 ,  H01L21/02631 ,  H01L21/02636 ,  H01L21/28568 ,  H10B41/27

Abstract: Some embodiments include a structure having an opening extending into an integrated configuration. A first material is within the opening, and is configured to create an undulating topography relative to a sidewall of the opening. The undulating topography has a surface roughness characterized by a mean roughness parameter Rmean which is the mean peak-to-valley distance along the undulating topography. The Rmean is at least about 4 nm. A second material is within the opening and along at least a portion of the undulating topography. The first and second materials are compositionally different from one another. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US20240206175A1

公开(公告)日：2024-06-20

申请号：US18540147

申请日：2023-12-14

Applicant: Micron Technology, Inc.

Inventor： Sidhartha Gupta ,  Adam W. Saxler ,  Andrew Li ,  John D. Hopkins

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers directly above a conductor tier. The first tiers comprise sacrificial material and the second tiers comprise non-sacrificial material that is of different composition from that of the sacrificial material. The stack comprises horizontally-elongated trenches extending through the first tiers and the second tiers and are individually between immediately-laterally-adjacent memory-block regions. Channel-material strings are formed that extend through the first and second tiers in the memory-block regions. Through the horizontally-elongated trenches, the sacrificial material is replaced with conductive material that comprises control-gate lines in the memory-block regions. After the replacing, conducting material is formed in a lowest of the first tiers and directly electrically couples together the channel material of the channel-material strings and conductor material of the conductor tier. Other embodiments, including structure, are disclosed.

公开(公告)号：US20230345723A1

公开(公告)日：2023-10-26

申请号：US17728651

申请日：2022-04-25

Applicant: Micron Technology, Inc.

Inventor： Yiping Wang ,  Adam W. Saxler ,  Narula Bilik

IPC: H01L27/11556 ,  H01L27/11582

CPC classification number: H01L27/11582 ,  H01L27/11556

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above a conductor tier. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The channel-material strings directly electrically couple with conductor material of the conductor tier by conductive material of a lowest of the conductive tiers. Insulating material of the insulative tier that is immediately-directly above the lowest conductive tier is directly against a top of the conductive material of the lowest conductive tier. The insulating material comprises at least one of aluminum oxide, hafnium oxide, zirconium oxide, and carbon-doped insulative material. Other embodiments, including method, are disclosed.

公开(公告)号：US20200075617A1

公开(公告)日：2020-03-05

申请号：US16555033

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Adam W. Saxler

IPC: H01L27/11556 ,  H01L27/11524 ,  H01L27/06

Abstract: An electronic device comprises an array of memory cells comprising a channel material laterally proximate to tiers of alternating conductive materials and dielectric materials. The channel material comprises a heterogeneous semiconductive material varying in composition across a width thereof. Related electronic systems and methods are also disclosed.