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1.
公开(公告)号:US11805645B2
公开(公告)日:2023-10-31
申请号:US16542645
申请日:2019-08-16
Applicant: Micron Technology, Inc.
Inventor: Nicholas R. Tapias , Andrew Li , Adam W. Saxler , Kunal Shrotri , Erik R. Byers , Matthew J. King , Diem Thy N. Tran , Wei Yeeng Ng , Anish A. Khandekar
IPC: H10B43/27 , H01L21/02 , H01L21/285 , H10B41/27
CPC classification number: H10B43/27 , H01L21/0217 , H01L21/02164 , H01L21/02532 , H01L21/02631 , H01L21/02636 , H01L21/28568 , H10B41/27
Abstract: Some embodiments include a structure having an opening extending into an integrated configuration. A first material is within the opening, and is configured to create an undulating topography relative to a sidewall of the opening. The undulating topography has a surface roughness characterized by a mean roughness parameter Rmean which is the mean peak-to-valley distance along the undulating topography. The Rmean is at least about 4 nm. A second material is within the opening and along at least a portion of the undulating topography. The first and second materials are compositionally different from one another. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies.
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公开(公告)号:US11751396B2
公开(公告)日:2023-09-05
申请号:US17648528
申请日:2022-01-20
Applicant: Micron Technology, Inc.
Inventor: Yifen Liu , Tecla Ghilardi , George Matamis , Justin D. Shepherdson , Nancy M. Lomeli , Chet E. Carter , Erik R. Byers
IPC: H10B43/27 , H01L21/768 , H01L23/528 , H01L23/532 , H01L23/522 , H10B41/27 , H10B41/35 , H10B43/35
CPC classification number: H10B43/27 , H01L21/76816 , H01L21/76877 , H01L23/5226 , H01L23/5283 , H01L23/53257 , H01L23/53271 , H10B41/27 , H10B41/35 , H10B43/35
Abstract: A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.
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公开(公告)号:US20220139958A1
公开(公告)日:2022-05-05
申请号:US17648528
申请日:2022-01-20
Applicant: Micron Technology, Inc.
Inventor: Yifen Liu , Tecla Ghilardi , George Matamis , Justin D. Shepherdson , Nancy M. Lomeli , Chet E. Carter , Erik R. Byers
IPC: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L21/768 , H01L23/528 , H01L23/532 , H01L23/522
Abstract: A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.
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4.
公开(公告)号:US11264404B2
公开(公告)日:2022-03-01
申请号:US16904317
申请日:2020-06-17
Applicant: Micron Technology, Inc.
Inventor: Yifen Liu , Tecla Ghilardi , George Matamis , Justin D. Shepherdson , Nancy M. Lomeli , Chet E. Carter , Erik R. Byers
IPC: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L21/768 , H01L23/528 , H01L23/532 , H01L23/522
Abstract: A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.
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5.
公开(公告)号:US20210399006A1
公开(公告)日:2021-12-23
申请号:US16904317
申请日:2020-06-17
Applicant: Micron Technology, Inc.
Inventor: Yifen Liu , Tecla Ghilardi , George Matamis , Justin D. Shepherdson , Nancy M. Lomeli , Chet E. Carter , Erik R. Byers
IPC: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L23/522 , H01L23/528 , H01L23/532 , H01L21/768
Abstract: A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.
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6.
公开(公告)号:US20210050364A1
公开(公告)日:2021-02-18
申请号:US16542645
申请日:2019-08-16
Applicant: Micron Technology, Inc.
Inventor: Nicholas R. Tapias , Andrew Li , Adam W. Saxler , Kunal Shrotri , Erik R. Byers , Matthew J. King , Diem Thy N. Tran , Wei Yeeng Ng , Anish A. Khandekar
IPC: H01L27/11582 , H01L27/11556 , H01L21/02 , H01L21/285
Abstract: Some embodiments include a structure having an opening extending into an integrated configuration. A first material is within the opening, and is configured to create an undulating topography relative to a sidewall of the opening. The undulating topography has a surface roughness characterized by a mean roughness parameter Rmean which is the mean peak-to-valley distance along the undulating topography. The Rmean is at least about 4 nm. A second material is within the opening and along at least a portion of the undulating topography. The first and second materials are compositionally different from one another. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies.
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