公开(公告)号：US12260088B2

公开(公告)日：2025-03-25

申请号：US17663722

申请日：2022-05-17

Applicant: Micron Technology, Inc.

Inventor： Marco Onorato ,  Luca Porzio ,  Roberto Izzi ,  Nadav Grosz

IPC: G06F3/06

Abstract: Methods, systems, and devices for commanded device states for a memory system are described. For example, a memory system may be configured with different device states that are each associated with a respective allocation of resources (e.g., feature sets) for operations of the memory system. Resource allocations corresponding to the different device states may be associated with different combinations of memory management configurations, error control configurations, trim parameters, degrees of parallelism, or endurance configurations, among other parameters of the memory system, which may support different tradeoffs between performance characteristics of the memory system. A host system may be configured to evaluate various parameters of operating the host system, and to transmit commands for a memory system to enter a desired device state of the memory system.

公开(公告)号：US20240345925A1

公开(公告)日：2024-10-17

申请号：US18638245

申请日：2024-04-17

Applicant: Micron Technology, Inc.

Inventor： Luca Porzio ,  Ferdinando Pascale ,  Roberto Izzi ,  Marco Onorato ,  Erminio Di Martino

IPC: G06F11/14 ,  G06F1/24 ,  G06F9/4401

CPC classification number: G06F11/1417 ,  G06F1/24 ,  G06F9/4405

Abstract: Methods, systems, and devices for hardware reset management for universal flash storage (UFS) are described. A UFS device may initiate a boot-up procedure that includes multiple phases. The UFS device may perform a first reset operation to reset one or more circuits based on receiving a first reset command during a first phase. The UFS device perform a second phase and may initiate a portion of a second reset operation to reset the one or more circuits during the second phase based on a likelihood that a second reset command is to be received. The UFS device may receive the second reset command during the second phase after initiating the portion of the second reset operation. The UFS device may initiate a second portion of the second reset operation based on receiving the second reset command and initiating the portion of the second reset operation.

公开(公告)号：US20240184488A1

公开(公告)日：2024-06-06

申请号：US18527041

申请日：2023-12-01

Applicant: Micron Technology, Inc.

Inventor： Marco Onorato ,  Luca Porzio ,  Roberto Izzi

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/0631 ,  G06F3/0679

Abstract: Methods, systems, and devices for app launch detection from read chunk analysis are described. Read commands may be received for accessing data stored in a memory system. The read commands may be used to determine a distribution of sizes for associated read data over an interval of time based, at least in part, on receiving the read commands. The memory system may detect the launch of an application based in part on the distribution of the sizes of the read data over the interval of time. Upon detecting the launch of the application, a procedure may be performed to reduce a duration associated with launching the application.

公开(公告)号：US20230305617A1

公开(公告)日：2023-09-28

申请号：US18096288

申请日：2023-01-12

Applicant: Micron Technology, Inc.

Inventor： Luca Porzio ,  Christian M. Gyllenskog ,  Giuseppe Cariello ,  Marco Onorato ,  Roberto IZZI ,  Stephen Hanna ,  Jonathan S. Parry ,  Reshmi Basu ,  Nadav Grosz ,  David Aaron Palmer

IPC: G06F1/3234 ,  G06F9/4401 ,  G06F1/324

CPC classification number: G06F1/3275 ,  G06F1/324 ,  G06F9/4411

Abstract: Methods, systems, and devices for dynamic power modes for boot-up procedures are described. A memory system may initiate a boot-up procedure according to a predefined first power mode that is associated with a first power consumption. The memory system may then determine whether to perform the boot-up procedure according to the first power mode or a second power mode associated with a different second power consumption. In cases that the memory system receives an indication of the second power mode from the host system, the memory system may perform the boot-up procedure according to the second power mode. Additionally, in cases that the memory system does not receive an indication of the second power mode from the host system, the memory system may perform the boot-up procedure according to the first power mode.