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    Read prediction during a system boot procedure
    2.
    发明授权
    Read prediction during a system boot procedure 有权

    公开(公告)号：US11782727B2

    公开(公告)日：2023-10-10

    申请号：US16888198

    申请日：2020-05-29

    Applicant: Micron Technology, Inc.

    Inventor： Qing Liang ,  Nadav Grosz ,  Jonathan S. Parry

    IPC: G06F9/4401 ,  G06F12/0877

    CPC classification number: G06F9/4403 ,  G06F12/0877 ,  G06F2212/603

    Abstract: Methods, systems, and devices for read prediction during a system boot procedure are described. A memory device may identify a command for a boot procedure and transfer data stored in a memory array to a cache of the memory device. In some cases, the memory device may prefetch data used during the boot procedure and thereby improve the latency of the boot procedure. When the memory device receives a command that requests data stored in the memory array as part of the boot procedure, the memory device may identify a cache hit based on prefetching the requested data before the command is received. In such cases, the memory device may retrieve the prefetched data from the cache.

    DATA DEFRAGMENTATION FOR A SYSTEM BOOT PROCEDURE
    4.
    发明公开
    DATA DEFRAGMENTATION FOR A SYSTEM BOOT PROCEDURE 审中-公开

    公开(公告)号：US20230195475A1

    公开(公告)日：2023-06-22

    申请号：US17645687

    申请日：2021-12-22

    Applicant: Micron Technology, Inc.

    Inventor： Francesco Basso ,  Luca Porzio ,  Roberto Izzi ,  Francesco Falanga ,  Nadav Grosz ,  Massimo Iaculo

    IPC: G06F9/4401 ,  G06F3/06

    CPC classification number: G06F9/4406 ,  G06F3/0644 ,  G06F3/061 ,  G06F3/0683

    Abstract: Methods, systems, and devices for data defragmentation for a system boot procedure are described. The memory system may determine a write random index associated with a boot procedure. The write random index may indicate a relationship between a first quantity of sequential logical addresses accessed as part of the boot procedure and a second quantity of random logical addresses accessed as part of the boot procedure. The memory system may determine whether the write random index satisfies a threshold based on determining the write random index. In some cases, the memory system may transfer, to a second portion of the memory system, data stored in a first portion of the memory system based on determining that the write random index satisfies the threshold. The memory system may receive a request to perform the boot procedure after transferring the data and output, to the host system, the data transferred.

    FACILITATING SEQUENTIAL READS IN MEMORY SUB-SYSTEMS
    6.
    发明申请
    FACILITATING SEQUENTIAL READS IN MEMORY SUB-SYSTEMS 有权

    公开(公告)号：US20220058138A1

    公开(公告)日：2022-02-24

    申请号：US17521360

    申请日：2021-11-08

    Applicant: Micron Technology, Inc.

    Inventor： Stephen Hanna ,  Nadav Grosz

    IPC: G06F12/14 ,  G06F1/24 ,  G06F12/02 ,  G06F12/06 ,  G06F21/79

    Abstract: An example memory subsystem includes a memory component and a processing device, operatively coupled to the memory component. The processing device is configured to receive a plurality of logical-to-physical (L2P) records, wherein an L2P record of the plurality of L2P records maps a logical block address to a physical address of a memory block on the memory component; determine a sequential assist value specifying a number of logical block addresses that are mapped to consecutive physical addresses sequentially following the physical address specified by the L2P record; generate a security token encoding the sequential assist value; and associate the security token with the L2P record.

    Large data read techniques
    7.
    发明授权
    Large data read techniques 有权

    公开(公告)号：US11210093B2

    公开(公告)日：2021-12-28

    申请号：US16565021

    申请日：2019-09-09

    Applicant: Micron Technology, Inc.

    Inventor： Qing Liang ,  Nadav Grosz

    IPC: G06F12/00 ,  G06F9/30 ,  G06F9/48 ,  G06F3/06 ,  G06F12/1009

    Abstract: Devices and techniques are disclosed herein for more efficiently exchanging large amounts of data between a host and a storage system. In an example, a read command can optionally include a read-type indicator. The read-type indicator can allow for exchange of a large amount of data between the host and the storage system using a single read command.

    HOST TIMEOUT AVOIDANCE IN A MEMORY DEVICE
    9.
    发明申请
    HOST TIMEOUT AVOIDANCE IN A MEMORY DEVICE 有权

    公开(公告)号：US20210124530A1

    公开(公告)日：2021-04-29

    申请号：US17140839

    申请日：2021-01-04

    Applicant: Micron Technology, Inc.

    Inventor： Nadav Grosz ,  David Aaron Palmer

    IPC: G06F3/06

    Abstract: Devices and techniques for host timeout avoidance in a memory device are disclosed herein. A memory device command is received with a memory device from a host. A determination is made, with the memory device, of a host timeout interval associated with the received memory device command. A tinier of the memory device is initialized to monitor a time interval from receipt of the memory device command. After partially performing the memory device command, a response to the host before the memory device timer interval reaches the host timeout interval is generated by the memory device.

    INCREASED EFFICIENCY OBFUSCATED LOGICAL-TO-PHYSICAL MAP MANAGEMENT
    10.
    发明申请
    INCREASED EFFICIENCY OBFUSCATED LOGICAL-TO-PHYSICAL MAP MANAGEMENT 有权

    公开(公告)号：US20210064548A1

    公开(公告)日：2021-03-04

    申请号：US16554937

    申请日：2019-08-29

    Applicant: Micron Technology, Inc.

    Inventor： Nadav Grosz ,  Jonathan Scott Parry

    IPC: G06F12/14 ,  G06F12/02

    Abstract: Devices and techniques for efficient obfuscated logical-to-physical mapping are described herein. For example, activity corresponding to obfuscated regions of an L2P map for a memory device can be tracked. A record of discontinuity between the obfuscated regions and L2P mappings resulting from the activity can be updated. The obfuscated regions can be ordered based on a level of discontinuity from the record of discontinuity. When an idle period is identified, an obfuscated region from the obfuscated regions is selected and refreshed based on the ordering.

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