公开(公告)号：US11417388B2

公开(公告)日：2022-08-16

申请号：US16904004

申请日：2020-06-17

Applicant: Micron Technology, Inc.

Inventor： Takayuki Miyamoto ,  Satoshi Yamanaka

IPC: G11C11/408 ,  G11C11/4096 ,  G11C11/4094 ,  G11C11/4093

Abstract: Semiconductor devices that include circuitry to mitigate unstable or metastable states in logic circuits in response to receipt of an unassigned row address. The semiconductor device may include one or more logic circuits that are configured to adjust particular address-based control signals to mitigate processing based on the unassigned row address. For example, the one or more logic circuits may override processing of the unassigned row address to provide control signals that correspond to an assigned row address, which may allow the semiconductor device to operate in a known state, rather than performing operations based on an unassigned row address.

公开(公告)号：US10937476B2

公开(公告)日：2021-03-02

申请号：US16450696

申请日：2019-06-24

Applicant: Micron Technology, Inc.

Inventor： Toshiyuki Sato ,  Shinichi Miyatake ,  Satoshi Yamanaka

IPC: G11C8/08 ,  G11C29/02 ,  G11C11/408 ,  G11C29/12

Abstract: Apparatuses and methods for controlling the discharge of subword lines are described. The rate of discharge and/or the voltage level discharged to may be controlled. In some embodiments, a main word line may be driven to multiple low potentials to control a discharge of a subword line. In some embodiments, a first word driver line signal and/or a second word driver line signal may be reset to control a discharge of a subword line. In some embodiments, a combination of driving the main word line and the first word driver line signal and/or the second word driver line signal resetting may be used to control a discharge of the subword line.

公开(公告)号：US10347321B1

公开(公告)日：2019-07-09

申请号：US15881200

申请日：2018-01-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Satoshi Yamanaka ,  Tetsuaki Okahiro

IPC: G11C11/4091 ,  G11C11/4074

CPC classification number: G11C11/4091 ,  G11C11/4074

Abstract: Apparatuses and methods for providing driving signals in semiconductor devices are described. An example apparatus includes a plurality of memory cell mats including a plurality of word lines and a word line driver coupled to the plurality of word lines of the plurality of memory cell mats. The word line driver is configured, responsive to a row active command, to provide a first voltage to a selected word line of the plurality of the word lines of a selected memory cell mat of the plurality of memory cell mats, provide a second voltage different from the first voltage to each of unselected word lines of the plurality of the word lines of the selected memory cell mats of the plurality of memory cell mats, and provide no voltage to each of the plurality of word lines of each of unselected memory cell mats of the plurality of memory cell mats.