公开(公告)号：US20210407928A1

公开(公告)日：2021-12-30

申请号：US17357233

申请日：2021-06-24

Applicant: NEC Corporation

Inventor： Kenji NANBA ,  Ayami YAMAGUCHI ,  Akira MIYATA ,  Katsumi KIKUCHI ,  Suguru WATANABE ,  Takanori NISHI ,  Hideyuki SATOU

IPC: H01L23/552 ,  H01L23/498

Abstract: A quantum device (100) includes an interposer (112), a quantum chip (111) mounted on the interposer (112), and a shield part (150) provided so as to surround a quantum circuit region of the interposer (112) and the quantum chip (111). Accordingly, the quantum device (100) is able to prevent interference in the quantum circuit region due to exogenous noise.

公开(公告)号：US20240136274A1

公开(公告)日：2024-04-25

申请号：US18226866

申请日：2023-07-26

Applicant: NEC Corporation

Inventor： Katsumi KIKUCHI ,  Akira MIYATA ,  Suguru WATANABE ,  Takanori NISHI ,  Hideyuki SATOU ,  Kenji NANBA ,  Ayami YAMAGUCHI

IPC: H01L23/498 ,  G06N10/40 ,  H01L23/13 ,  H01L23/367 ,  H10N60/81 ,  H10N69/00

CPC classification number: H01L23/49888 ,  G06N10/40 ,  H01L23/13 ,  H01L23/3677 ,  H10N60/815 ,  H10N69/00 ,  H01L23/36

Abstract: A quantum device capable of effectively cooling a quantum chip and an area (e.g., a space) therearound is provided. A quantum device includes a quantum chip and an interposer on which the quantum chip is located. The interposer includes an interposer substrate and an interposer wiring layer. The interposer wiring layer is disposed on a surface of the interposer substrate on a side on which the quantum chip is located. The interposer wiring layer includes, in at least a part thereof, a superconducting material layer formed of a superconducting material and a non-superconducting material layer formed of a non-superconducting material.

公开(公告)号：US20230345844A1

公开(公告)日：2023-10-26

申请号：US18007772

申请日：2020-06-05

Applicant: NEC Corporation

Inventor： Katsumi KIKUCHI ,  Akira MIYATA ,  Suguru WATANABE ,  Takanori NISHI ,  Hideyuki SATOU ,  Kenji NANBA ,  Ayami YAMAGUCHI

IPC: H10N60/81 ,  H01P7/08 ,  G06N10/40

CPC classification number: H10N60/815 ,  H01P7/082 ,  G06N10/40

Abstract: Provided is a quantum device capable of improving cooling performance. A quantum device includes a quantum chip configured to perform information processing using a quantum state, and an interposer on which the quantum chip is mounted, and the quantum chip is arranged inside a recess 31 formed in a sample stage having a cooling function, and a part of the interposer is in contact with the sample stage. The quantum chip may have a first surface mounted on the interposer and a second surface opposite to the first surface, and at least a part of the second surface may be in contact with an inner surface of the recess.

公开(公告)号：US20230237362A1

公开(公告)日：2023-07-27

申请号：US18007769

申请日：2020-06-05

Applicant: NEC Corporation

Inventor： Akira MIYATA ,  Katsumi KIKUCHI ,  Suguru WATANABE ,  Takanori NISHI ,  Hideyuki SATOU ,  Tomohiro YAMAJI ,  Tsuyoshi YAMAMOTO ,  Yoshihito HASHIMOTO

IPC: G06N10/40 ,  G01R33/035

CPC classification number: G06N10/40 ,  G01R33/0354

Abstract: Provided is a quantum device capable of suppressing reduction in performance of quantum bit even when a quantum chip is flip-chip mounted on an interposer. A quantum chip (10) is flip-chip mounted on an interposer (20) by a bump (30). A coplanar line (12) coupling adjacent quantum bits is formed on the quantum chip (10). A gap (22) is provided, in the interposer (20), at a location facing a center conductor (12a) of the coplanar line (12). A second ground electrode (24) is formed around gap (22). The interposer (20) has a connection electrode (40) connecting the second ground electrode (24) around the gap (22). A bump (30A) formed in the vicinity of the connection electrode (40) is connected to the first ground electrode (12b) and the second ground electrode (24).