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    Superconductive Memory Cells and Devices
    4.
    发明公开
    Superconductive Memory Cells and Devices 审中-公开

    公开(公告)号：US20240249770A1

    公开(公告)日：2024-07-25

    申请号：US18587872

    申请日：2024-02-26

    Applicant: PsiQuantum Corp,

    Inventor： Faraz Najafi

    IPC: G11C11/44 ,  H10N60/01 ,  H10N60/30 ,  H10N60/83 ,  H10N60/84 ,  H10N60/85 ,  H10N69/00

    CPC classification number: G11C11/44 ,  H10N60/30 ,  H10N60/83 ,  H10N60/84 ,  H10N69/00 ,  H10N60/01 ,  H10N60/85

    Abstract: An example memory cell includes a superconducting loop configured to receive a write current and form a persistent current that stores a data bit in the superconducting loop. The example memory cell further includes a superconducting wire coupled to the superconducting loop and configured to selectively read-out the data bit in the superconducting loop in response to a control signal. An example method of reading data from the memory cell includes receiving, at the superconducting loop, a write current to store a data bit in a superconducting loop, and forming a persistent current that circulates in the superconducting loop as a stored data bit. The example method further includes, in accordance with a control signal, transferring, via a superconducting wire of the memory cell that is coupled to the superconducting loop, at least a portion of the persistent current to an output of the memory cell.

    Progressive thermal drying chamber for quantum circuits
    6.
    发明授权
    Progressive thermal drying chamber for quantum circuits 有权

    公开(公告)号：US12022745B2

    公开(公告)日：2024-06-25

    申请号：US17321462

    申请日：2021-05-16

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Quang Thanh Tran ,  Judith Cutaran Aarts ,  John S. Hickman ,  Thanh Cong Dinh

    IPC: H10N60/01 ,  G06N10/00 ,  H01L21/67 ,  H10N69/00

    CPC classification number: H10N60/01 ,  G06N10/00 ,  H01L21/67034 ,  H10N69/00

    Abstract: Techniques are described herein that are capable of progressively thermally drying a quantum circuit. An inert gas is progressively heated by a heater element to provide a heated inert gas. Heated ambient air and the heated inert gas combine in a heating channel, causing a combination of the heated ambient air and the heated inert gas to flow into a probe compartment to progressively thermally dry a quantum circuit therein. A flow rate of the inert gas is controlled to cause the combination to have a relative humidity less than or equal to a threshold. A temperature of the heater element may be controlled to be approximately equal to a progressively increasing target temperature within a tolerance of 3.0° C. Heating of the inert gas may be initiated based on detection of the inert gas, and the flow and heating of the inert gas may be automatically discontinued.

    High connectivity parametric gate
    7.
    发明授权
    High connectivity parametric gate 有权

    公开(公告)号：US12015397B2

    公开(公告)日：2024-06-18

    申请号：US17820721

    申请日：2022-08-18

    Applicant: International Business Machines Corporation

    Inventor： Timothy Phung

    IPC: H03K17/92 ,  G06N10/40 ,  H10N60/12 ,  H10N69/00

    CPC classification number: H03K17/92 ,  G06N10/40 ,  H10N60/12 ,  H10N69/00

    Abstract: One or more systems, devices, and/or methods of manufacture and/or use provided herein relate to a quantum computing process to achieve higher connectivity of qubits to more than nearest neighbors and/or to a plurality of nearest neighbors. A system can comprise a tunable first coupler coupled to a first qubit, a tunable second coupler coupled to a second qubit, and a junction coupling the first coupler and the second coupler being both parametrically drivable. The first coupler and the second coupler can comprise superconducting quantum interference devices or Josephson junctions. The junction can comprise a central hub or central node separately coupled to the first coupler and the second coupler. The first coupler and the second coupler can be configured to capacitively or inductively couple the first qubit and the second qubit to one another to perform a control-Z (CZ) gate or an iSWAP gate.

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