TRANSISTOR WITH REDUCTED PARASITIC
    11.
    发明申请
    TRANSISTOR WITH REDUCTED PARASITIC 审中-公开
    具有减少的PARASITIC的晶体管

    公开(公告)号:US20150236090A1

    公开(公告)日:2015-08-20

    申请号:US14180418

    申请日:2014-02-14

    Applicant: NXP B.V.

    Abstract: Parasitic thyristor action may be mitigated in semiconductor devices by placement of minority carrier traps, illustratively in the base(s) of bipolar transistors or the well of a CMOS transistor pair. The minority carrier traps include adjacent n and p regions which may be connected by a conductor.

    Abstract translation: 寄生晶闸管的作用可以通过放置少数载流子陷阱在半导体器件中得到缓解,例如在双极晶体管的基极或CMOS晶体管对的阱中。 少数载流子陷阱包括可由导体连接的相邻的n和p区。

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