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公开(公告)号:US09386642B2
公开(公告)日:2016-07-05
申请号:US14704768
申请日:2015-05-05
Applicant: NXP B.V.
IPC: H01L29/06 , H01L29/861 , H01L29/732 , H01L29/74 , H01L27/02 , H01L49/02 , H05B33/08 , H02M7/217 , H01L29/87
CPC classification number: H05B33/0815 , H01L27/0255 , H01L27/0259 , H01L27/0262 , H01L27/0288 , H01L28/20 , H01L29/0638 , H01L29/0684 , H01L29/732 , H01L29/74 , H01L29/861 , H01L29/87 , H02M7/217
Abstract: A semiconductor device (300a) comprising: a substrate (302) having a first surface (303); an n-type well (304) extending from the first surface (303) into the substrate (302) and configured to form a depletion region (306) in the substrate (302) around the n-type well (304); an insulating layer (340) extending over the first surface (303) of the substrate (302) from the n-type well (304), the insulating layer (340) configured to form an inversion layer (342) in the substrate (302) extending from the n-type well (304) adjacent to the first surface (303); wherein a p-type floating channel stopper (370a) is provided, configured to extend through the inversion layer (342) to reduce electrical coupling between the n-type well (304) and at least part of the inversion layer (342), and is electrically disconnected from a remainder of the substrate (320) outside of the depletion region (306).
Abstract translation: 一种半导体器件(300a),包括:具有第一表面(303)的衬底(302); 从所述第一表面(303)延伸到所述衬底(302)中并且被配置为在所述衬底(302)内围绕所述n型阱(304)形成耗尽区(306)的n型阱(304)。 绝缘层(340),其从所述n型阱(304)延伸到所述衬底(302)的所述第一表面(303)上方,所述绝缘层(340)被配置为在所述衬底(302)中形成反型层(342) )从邻近第一表面(303)的n型阱(304)延伸; 其特征在于,设置有p型浮动通道止动器(370a),其构造成延伸穿过所述反型层(342)以减小所述n型阱(304)与所述反型层(342)的至少一部分之间的电耦合,以及 与耗尽区(306)外部的衬底(320)的其余部分电连接。
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公开(公告)号:US20160268447A1
公开(公告)日:2016-09-15
申请号:US15044005
申请日:2016-02-15
Applicant: NXP B.V.
Inventor: Hans-Martin Ritter
CPC classification number: H01L29/87 , H01L27/0262 , H01L29/0649 , H01L29/36
Abstract: The disclosure relates to a data transmission system (100) comprising a signal line (101) and a ground line (103). A first signal path (102) is provided between the signal line (101) and the ground line (103). The first signal path (102) comprises a Shockley diode (104) having a cathode (106) and an anode (108). The cathode (106) is connected to the ground line (103) and the anode (108) is connected to the signal line (101).
Abstract translation: 本公开涉及包括信号线(101)和接地线(103)的数据传输系统(100)。 第一信号路径(102)设置在信号线(101)和接地线(103)之间。 第一信号路径(102)包括具有阴极(106)和阳极(108)的肖克利二极管(104)。 阴极(106)连接到地线(103),阳极(108)连接到信号线(101)。
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公开(公告)号:US20160211068A1
公开(公告)日:2016-07-21
申请号:US14984614
申请日:2015-12-30
Applicant: NXP B.V.
Inventor: Hans-Martin Ritter
IPC: H01F27/28
CPC classification number: H01F27/2804 , H01F2017/0093 , H03H7/427
Abstract: A common mode choke comprising a first planar coil for receiving a first signal, a second planar coil for receiving a second signal, the first and second coils comprising substantially mirror images of one another and arranged side by side in a common plane, the first planar coil and second planar coil electromagnetically coupled by a closed coupling loop.
Abstract translation: 一种共模扼流圈,包括用于接收第一信号的第一平面线圈,用于接收第二信号的第二平面线圈,所述第一和第二线圈彼此基本上包括相互镜像并且并排布置在公共平面中,所述第一平面 线圈和第二平面线圈通过闭合耦合回路电磁耦合。
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公开(公告)号:US09385115B2
公开(公告)日:2016-07-05
申请号:US14848003
申请日:2015-09-08
Applicant: NXP B.V.
CPC classification number: H01L27/0255 , H01L27/0262 , H01L27/067 , H01L29/0626 , H01L29/7416 , H01L29/7436 , H01L29/87
Abstract: The present disclosure relates to an electrostatic discharge (ESD) protection device. The electrostatic discharge protection device, may comprise: a semiconductor controlled rectifier; and a p-n diode. The semiconductor controlled rectifier and the diode may be integrally disposed laterally at a major surface of a semiconductor substrate; and a current path for the semiconductor controlled rectifier may be separate from a current path for the diode.
Abstract translation: 本公开涉及一种静电放电(ESD)保护装置。 静电放电保护器件可以包括:半导体可控整流器; 和p-n二极管。 半导体可控整流器和二极管可以横向地集成在半导体衬底的主表面上; 并且用于半导体可控整流器的电流路径可以与用于二极管的电流路径分离。
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公开(公告)号:US20150333119A1
公开(公告)日:2015-11-19
申请号:US14704768
申请日:2015-05-05
Applicant: NXP B.V.
IPC: H01L29/06 , H01L29/861 , H01L29/732 , H01L29/74 , H01L27/02 , H01L49/02
CPC classification number: H05B33/0815 , H01L27/0255 , H01L27/0259 , H01L27/0262 , H01L27/0288 , H01L28/20 , H01L29/0638 , H01L29/0684 , H01L29/732 , H01L29/74 , H01L29/861 , H01L29/87 , H02M7/217
Abstract: A semiconductor device (300a) comprising: a substrate (302) having a first surface (303); an n-type well (304) extending from the first surface (303) into the substrate (302) and configured to form a depletion region (306) in the substrate (302) around the n-type well (304); an insulating layer (340) extending over the first surface (303) of the substrate (302) from the n-type well (304), the insulating layer (340) configured to form an inversion layer (342) in the substrate (302) extending from the n-type well (304) adjacent to the first surface (303); wherein a p-type floating channel stopper (370a) is provided, configured to extend through the inversion layer (342) to reduce electrical coupling between the n-type well (304) and at least part of the inversion layer (342), and is electrically disconnected from a remainder of the substrate (320) outside of the depletion region (306).
Abstract translation: 一种半导体器件(300a),包括:具有第一表面(303)的衬底(302); 从所述第一表面(303)延伸到所述衬底(302)中并且被配置为在所述衬底(302)内围绕所述n型阱(304)形成耗尽区(306)的n型阱(304)。 绝缘层(340),其从所述n型阱(304)延伸到所述衬底(302)的所述第一表面(303)上方,所述绝缘层(340)被配置为在所述衬底(302)中形成反型层(342) )从邻近第一表面(303)的n型阱(304)延伸; 其特征在于,设置有p型浮动通道止动器(370a),其构造成延伸穿过所述反型层(342)以减小所述n型阱(304)与所述反型层(342)的至少一部分之间的电耦合,以及 与耗尽区(306)外部的衬底(320)的其余部分电连接。
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公开(公告)号:US20180145065A1
公开(公告)日:2018-05-24
申请号:US15357570
申请日:2016-11-21
Applicant: NXP B.V.
Inventor: Steffen Holland , Hans-Martin Ritter
IPC: H01L27/02 , H01L29/872 , H01L29/808 , H01L29/417 , H01L29/87 , H01L29/78 , H01L29/06 , H01L29/08 , H02H9/04 , H01L27/12
CPC classification number: H01L27/0255 , H01L27/0262 , H01L27/1203 , H01L29/0649 , H01L29/0692 , H01L29/0847 , H01L29/41758 , H01L29/78 , H01L29/808 , H01L29/8083 , H01L29/861 , H01L29/87 , H01L29/872 , H02H9/046
Abstract: Various aspects of the disclosure are directed to circuitry that may be used to shunt current. As may be consistent with one or more embodiments a first circuit has a plurality of alternating p-type and n-type semiconductor regions with respective p-n junctions therebetween, arranged between an anode end and a cathode end. A second (e.g., bypass) circuit is connected to one of the alternating p-type and n-type semiconductor regions, and forms a further p-n junction therewith. The second circuit operates to provide carrier flow, which influences operation of the first circuit.
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公开(公告)号:US20170170122A1
公开(公告)日:2017-06-15
申请号:US15356527
申请日:2016-11-18
Applicant: NXP B.V.
Inventor: Hans-Martin Ritter , Joachim Utzig , Frank Burmeister , Godfried Henricus Josephus Notermans , Jochen Wynants , Rainer Mintzlaff
IPC: H01L23/538 , H01L29/06 , H01L21/78
CPC classification number: H01L23/3171 , H01L21/78 , H01L23/291 , H01L23/3192 , H01L23/5386 , H01L29/0649 , H01L29/2003 , H01L29/205 , H01L29/402 , H01L29/66212 , H01L29/66462 , H01L29/7786 , H01L29/872
Abstract: A semiconductor device and a method of making the same. The device includes a substrate comprising a major surface and a backside. The device also includes a dielectric partition for electrically isolating a first part of the substrate from a second part of the substrate. The dielectric partition extends through the substrate from the major surface to the backside.
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公开(公告)号:US20160218058A1
公开(公告)日:2016-07-28
申请号:US14988443
申请日:2016-01-05
Applicant: NXP B.V.
Inventor: Zhihao Pan , Friedrich Hahn , Steffen Holland , Olaf Pfennigstorf , Jochen Wynants , Hans-Martin Ritter
IPC: H01L23/498 , H01L23/532 , H01L21/78
Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate provided in a chip-scale package (CSP). The device also includes a plurality of contacts provided on a major surface of the substrate. The device further includes an electrically floating metal layer forming an ohmic contact on a backside of the semiconductor substrate. The device is operable to conduct a current that passes through the substrate from a first of said plurality of contacts to a second of said plurality of contacts via the metal layer on the backside.
Abstract translation: 半导体器件及其制造方法。 该器件包括设置在芯片级封装(CSP)中的半导体衬底。 该装置还包括设置在基板的主表面上的多个触点。 该器件还包括在半导体衬底的背面形成欧姆接触的电浮置金属层。 所述装置可操作以经由背面上的金属层将从所述多个触点中的第一触点穿过基板的电流传导到所述多个触点中的第二触点。
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公开(公告)号:US20160104700A1
公开(公告)日:2016-04-14
申请号:US14848003
申请日:2015-09-08
Applicant: NXP B.V.
CPC classification number: H01L27/0255 , H01L27/0262 , H01L27/067 , H01L29/0626 , H01L29/7416 , H01L29/7436 , H01L29/87
Abstract: The present disclosure relates to an electrostatic discharge (ESD) protection device. The electrostatic discharge protection device, may comprise: a semiconductor controlled rectifier; and a p-n diode. The semiconductor controlled rectifier and the diode may be integrally disposed laterally at a major surface of a semiconductor substrate; and a current path for the semiconductor controlled rectifier may be separate from a current path for the diode.
Abstract translation: 本公开涉及一种静电放电(ESD)保护装置。 静电放电保护器件可以包括:半导体可控整流器; 和p-n二极管。 半导体可控整流器和二极管可以横向地集成在半导体衬底的主表面上; 并且用于半导体可控整流器的电流路径可以与用于二极管的电流路径分离。
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公开(公告)号:US09368963B2
公开(公告)日:2016-06-14
申请号:US14072122
申请日:2013-11-05
Applicant: NXP B.V.
Inventor: Klaus Reimann , Hans-Martin Ritter , Wolfgang Schnitt , Anco Heringa
CPC classification number: H02H9/046 , H01L27/0255
Abstract: An ESD protection circuit comprises a series connection of at least two protection components between a signal line to be protected and a return line (e.g. ground), comprising a first protection component connected to the signal line and a second protection component connected to the ground line. They are connected with opposite polarity so that when one conducts in forward direction the other conducts in reverse breakdown mode. A bias voltage source connects to the junction between the two protection components through a bias impedance. The use of the bias voltage enables the signal distortions resulting from the ESD protection circuit to be reduced.
Abstract translation: ESD保护电路包括在待保护的信号线和返回线(例如接地)之间的至少两个保护部件的串联连接,包括连接到信号线的第一保护部件和连接到接地线的第二保护部件 。 它们以相反的极性连接,使得当一个正向导通时,另一个导通反向击穿模式。 偏置电压源通过偏置阻抗连接到两个保护元件之间的接点。 使用偏置电压可以降低由ESD保护电路产生的信号失真。
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