公开(公告)号：US20210035820A1

公开(公告)日：2021-02-04

申请号：US17072569

申请日：2020-10-16

Applicant: NXP B.V.

Inventor： Wiwat Tanwongwan ,  Amornthep Saiyajitara ,  Nathapop Lappanitpullpol

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  G06K19/077 ,  H01L23/498 ,  H01L21/48

Abstract: A lead frame used to assemble a semiconductor device, such as a smart card, has a first major surface including exposed leads and a second major surface including a die receiving area and one or more connection pads surrounding the die receiving area. The connection pads enable electrical connection of an Integrated Circuit (IC) die to the exposed leads. A molding tape sized and shaped like the lead frame is adhered to and covers the second major surface of the lead frame. The molding tape has a die receiving area cut-out that exposes the die receiving area and the connection pads on the second major surface of the lead frame and forms a cavity for receiving an encapsulant. The cut-out has an elevated sidewall for retaining the encapsulant within the cavity.

公开(公告)号：US20200258831A1

公开(公告)日：2020-08-13

申请号：US16270607

申请日：2019-02-08

Applicant: NXP B.V.

Inventor： Amornthep Saiyajitara ,  Wiwat Tanwongwan ,  Nathapop Lappanitpullpol

IPC: H01L23/498 ,  H01L23/00

Abstract: A lead frame for assembling a smart card is formed with a substrate having first and second opposing major surfaces. A die receiving area is formed in the first major surface of the substrate and surrounded by conductive vias. A conductive coating is formed on the second major surface of the substrate and patterned to form electrical contact pads over the conductive vias. A conductive trace is formed on the first major surface of the substrate. The conductive trace extends between at least two adjacent vias and partially surrounds the at least two adjacent conductive vias, thereby forming a gap in the portion of the trace that surrounds the vias. An electrical connection between an integrated circuit chip and the conductive via extends over the gap. The gap prevents the electrical connection from inadvertently contacting the conductive trace.

公开(公告)号：US20150380362A1

公开(公告)日：2015-12-31

申请号：US14317224

申请日：2014-06-27

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Wiwat Tanwongwan

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/495

CPC classification number: H01L23/562 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/16 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16245 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/1432 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

Abstract: Various aspects are directed to apparatuses, systems and related methods involving the mitigation of issues relating to thermal expansion and contraction of lead fingers of an integrated circuit package. Consistent with one or more embodiments, lead fingers on a leadframe substrate each have a locking structure that secures the lead finger in place relative to the substrate. The lead fingers provide a location to attach a bond wire to an integrated circuit, and connect the bond wire to terminals at a perimeter of the leadframe. The locking structure and arrangement of the lead fingers mitigate issues such as cracking or breaking of a solder connection of the bond wire to the leadframe, which can occur due to thermal expansion and contraction.

Abstract translation: 各种方面涉及涉及减轻与集成电路封装的引线的热膨胀和收缩有关的问题的装置，系统和相关方法。 与一个或多个实施例一致，引线框架基板上的引脚各自具有锁定结构，其将引线指相对于基板固定就位。 引导指提供将接合线附接到集成电路的位置，并且将接合线连接到引线框的周边处的端子。 引线指的锁定结构和布置减轻了由于热膨胀和收缩而导致的接合线与引线框的焊接连接的破裂或断裂的问题。