公开(公告)号：US20210151251A1

公开(公告)日：2021-05-20

申请号：US16689347

申请日：2019-11-20

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Wiwat Tanwongwan ,  Amornthep Saiyajitara ,  Chanon Suwankasab

IPC: H01G2/06 ,  H05K3/34 ,  H01L23/00

Abstract: A device includes a leadframe and an electronic component. The leadframe includes a first leadframe element having a first surface and a second leadframe element adjacent to the first leadframe element, the first and second leadframe elements being separate from one another, the second leadframe element having a second surface. A first flange extends from a first outer edge of the first leadframe element and extends away from the first surface of the first leadframe element. A second flange extends from a second outer edge of the second leadframe element and extends away from the second surface of the second leadframe element. The electronic component is coupled to the first and second surfaces of the first and second leadframe elements such that the first and second flanges are located at opposing first and second sidewalls of the electronic component.

公开(公告)号：US20150380362A1

公开(公告)日：2015-12-31

申请号：US14317224

申请日：2014-06-27

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Wiwat Tanwongwan

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/495

CPC classification number: H01L23/562 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/16 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16245 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/1432 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

Abstract: Various aspects are directed to apparatuses, systems and related methods involving the mitigation of issues relating to thermal expansion and contraction of lead fingers of an integrated circuit package. Consistent with one or more embodiments, lead fingers on a leadframe substrate each have a locking structure that secures the lead finger in place relative to the substrate. The lead fingers provide a location to attach a bond wire to an integrated circuit, and connect the bond wire to terminals at a perimeter of the leadframe. The locking structure and arrangement of the lead fingers mitigate issues such as cracking or breaking of a solder connection of the bond wire to the leadframe, which can occur due to thermal expansion and contraction.

Abstract translation: 各种方面涉及涉及减轻与集成电路封装的引线的热膨胀和收缩有关的问题的装置，系统和相关方法。 与一个或多个实施例一致，引线框架基板上的引脚各自具有锁定结构，其将引线指相对于基板固定就位。 引导指提供将接合线附接到集成电路的位置，并且将接合线连接到引线框的周边处的端子。 引线指的锁定结构和布置减轻了由于热膨胀和收缩而导致的接合线与引线框的焊接连接的破裂或断裂的问题。

公开(公告)号：US12125771B2

公开(公告)日：2024-10-22

申请号：US17643193

申请日：2021-12-08

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Chanon Suwankasab ,  Amornthep Saiyajitara ,  Verapath Vareesantichai

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49503 ,  H01L23/3107 ,  H01L23/49593 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48245 ,  H01L2224/73265 ,  H01L2224/83385

Abstract: A semiconductor package comprises a leadframe, a component module, and a semiconductor die. The leadframe has a plurality of insertion terminals, a split die pad, and one or more leads. The component module has one or more passive components mounted on a substrate. The semiconductor die has an integrated circuit. The component module is mounted on a split die pad at a first surface of the leadframe and forms an electrical connection with the insertion terminals. Further, the semiconductor die is mounted on the split die pad at a second surface of the leadframe which is opposite to the first surface.

公开(公告)号：US11049817B2

公开(公告)日：2021-06-29

申请号：US16283853

申请日：2019-02-25

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Amornthep Saiyajitara ,  Chanon Suwankasab ,  Russell Joseph Lynch

IPC: H01L23/552 ,  H01L23/06 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/49 ,  H01L23/528

Abstract: A shielded semiconductor device has a first die attached to a die pad of a lead frame and a second die attached to a surface of the first die. The first die is electrically connected to inner lead ends of leads that surround the die pad, and the second die is electrically connected to the first die and to an inner end of a shielding lead. A mold compound forms a body around the first and second dies and the electrical connections. Outer lead ends of the leads project from the sides of the body. The outer end of the shielding lead projects from a central location of one side of the body and is bent up the side surface from which it projects and over the top of the body and provides EMI shielding.

公开(公告)号：US10790220B2

公开(公告)日：2020-09-29

申请号：US16164776

申请日：2018-10-18

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Stephen Ryan Hooper ,  Chanon Suwankasab ,  Amornthep Saiyajitara ,  Bernd Offermann ,  James Lee Grothe ,  Russell Joseph Lynch

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H01R12/58

Abstract: A press-fit semiconductor device includes a lead frame having a die pad, leads with inner and outer lead ends, and a press-fit lead. The press-fit lead has a circular section between an outer lead end and an inner lead end, and the circular section has a central hole that is sized and shaped to receive a press-fit connection pin. A die is attached to the die pad and electrically connected to the inner lead ends of the leads and the inner lead end of the press-fit lead. The die, electrical connections and inner lead ends are covered with an encapsulant that forms a housing. The outer lead ends of the leads extend beyond the housing. The housing has a hole extending therethrough that is aligned with the center hole of the press-fit lead, so that a press-fit connection pin can be pushed through the hole to connect the device to a circuit board.

公开(公告)号：US10340211B1

公开(公告)日：2019-07-02

申请号：US15922873

申请日：2018-03-15

Applicant: NXP B.V.

Inventor： Chanon Suwankasab ,  Amornthep Saiyajitara ,  Chayathorn Saklang ,  Stephen Ryan Hooper

IPC: H01L23/495 ,  H01L21/56 ,  G01P1/02 ,  H01L25/16 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L23/02 ,  H01L21/52 ,  G01P15/00

Abstract: A sensor module, such as an acceleration sensor module, includes a leaded socket assembly covered by a housing. The leaded socket assembly includes a dual gauge lead frame, a sensor die, and various passive devices. The sensor die and the passive devices are mounted on the lead frame, and then the lead frame, sensor die, and passive devices are over-molded to form the leaded socket assembly. Neither the sensor module nor the socket assembly includes a printed circuit board, so many conventional sensor module assembly steps are bypassed.

公开(公告)号：US09824980B2

公开(公告)日：2017-11-21

申请号：US14317224

申请日：2014-06-27

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Wiwat Tanwongwan

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/16 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16245 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/1432 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

Abstract: Various aspects are directed to apparatuses, systems and related methods involving the mitigation of issues relating to thermal expansion and contraction of lead fingers of an integrated circuit package. Consistent with one or more embodiments, lead fingers on a leadframe substrate each have a locking structure that secures the lead finger in place relative to the substrate. The lead fingers provide a location to attach a bond wire to an integrated circuit, and connect the bond wire to terminals at a perimeter of the leadframe. The locking structure and arrangement of the lead fingers mitigate issues such as cracking or breaking of a solder connection of the bond wire to the leadframe, which can occur due to thermal expansion and contraction.

公开(公告)号：US20170033034A1

公开(公告)日：2017-02-02

申请号：US15208827

申请日：2016-07-13

Applicant: NXP B.V.

Inventor： Chayathorn Saklang ,  Wiwat Tanwongwan

IPC: H01L23/495 ,  H01L23/31 ,  G01P3/44 ,  H01L23/29

CPC classification number: H01L23/49537 ,  G01P3/44 ,  G01R33/0047 ,  G01R33/0052 ,  H01L23/293 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/4951 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/2919 ,  H01L2224/32012 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00014 ,  H01L2924/15747 ,  H01L2924/35121 ,  H01L2924/00012 ,  H01L2924/078 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00

Abstract: A packaged electronic device is disclosed, comprising: a package, a die and a first bondwire. The package comprises a leadframe. The leadframe comprises a first conducting leadframe element and a second conducting leadframe element that are separate from each other. The die comprises a first bondpad. The first bondwire electrically connects the first bondpad to the first conducting leadframe element. The die mechanically couples the first and second leadframe elements together.

Abstract translation: 公开了一种封装的电子设备，包括：封装，管芯和第一接合线。 包装包括引线框架。 引线框架包括彼此分离的第一导电引线框架元件和第二导电引线框架元件。 模具包括第一接合垫。 第一接合线将第一接合焊盘电连接到第一导电引线框架元件。 模具将第一和第二引线框架元件机械耦合在一起。

公开(公告)号：US11482478B2

公开(公告)日：2022-10-25

申请号：US16936480

申请日：2020-07-23

Applicant: NXP B.V.

Inventor： Crispulo Estira Lictao, Jr. ,  Chayathorn Saklang ,  Amornthep Saiyajitara ,  Chanon Suwankasab ,  Stephen Ryan Hooper ,  Bernd Offermann

IPC: H01L23/552 ,  H01L23/495 ,  H01L23/00 ,  H01L25/00

Abstract: An electronic device package includes a first die coupled to a substrate, a second die coupled with the first die, and a spacer element coupled to the second die to form a stacked structure that includes the first die, the second die, and the spacer element. An electrically conductive shield overlies the stacked structure. The shield has a first end coupled to the spacer element and a second end coupled to the substrate. Inter-chip bond wires may electrically interconnect the first and second dies, and the shield may additionally overlie the bond wires. The spacer element may extend above a surface of the second die at a height that is sufficient to prevent the shield from touching the inter-chip bond wires.

公开(公告)号：US20220028766A1

公开(公告)日：2022-01-27

申请号：US16936480

申请日：2020-07-23

Applicant: NXP B.V.

Inventor： Crispulo Estira Lictao, JR. ,  Chayathorn Saklang ,  Amornthep Saiyajitara ,  Chanon Suwankasab ,  Stephen Ryan Hooper ,  Bernd Offermann

IPC: H01L23/495 ,  H01L23/552 ,  H01L23/00 ,  H01L25/00

Abstract: An electronic device package includes a first die coupled to a substrate, a second die coupled with the first die, and a spacer element coupled to the second die to form a stacked structure that includes the first die, the second die, and the spacer element. An electrically conductive shield overlies the stacked structure. The shield has a first end coupled to the spacer element and a second end coupled to the substrate. Inter-chip bond wires may electrically interconnect the first and second dies, and the shield may additionally overlie the bond wires. The spacer element may extend above a surface of the second die at a height that is sufficient to prevent the shield from touching the inter-chip bond wires.