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公开(公告)号:US11099986B2
公开(公告)日:2021-08-24
申请号:US16383479
申请日:2019-04-12
Applicant: Pure Storage, Inc.
Inventor: Yuhong Mao , Russell Sears
IPC: G06F12/0804 , G11C29/52 , G06F11/10
Abstract: A method of operating a storage unit having non-volatile random-access memory (NVRAM) and solid-state memory is provided. The method includes transferring contents of the NVRAM to the solid-state memory, in response to detecting a power loss. The method includes during the transferring, having each of a plurality of channels in parallel, reading one or more of a plurality of logical unit numbers (LUNs) each corresponding to a portion of the NVRAM, performing an XOR of data of each of the one or more of the plurality of LUNs with data of a preceding LUN, and writing results of the XOR to the solid-state memory.
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公开(公告)号:US20210232331A1
公开(公告)日:2021-07-29
申请号:US17138885
申请日:2020-12-30
Applicant: PURE STORAGE, INC.
Inventor: Hari Kannan , Yuhong Mao , Mark Heuchert
Abstract: A storage system, blades, removable modules, and method of configuring a storage system are described. The storage system has blades with computing resources and storage resources. At least one of the blades has, or has added, one or more removable modules.
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公开(公告)号:US20200045111A1
公开(公告)日:2020-02-06
申请号:US16601328
申请日:2019-10-14
Applicant: Pure Storage, Inc.
Inventor: Hari Kannan , Yuhong Mao , John Colgrove
IPC: H04L29/08 , G06F3/06 , G06F12/02 , G06F11/10 , H04L12/933 , G06F11/20 , G11C29/52 , H03M13/15 , G06F13/40 , G06F13/42 , H04L12/40
Abstract: In some embodiments, a storage system with internal communication for data resiliency, is provided. The storage system includes a plurality of blades, each having a processor of a storage node arranged for communication with other blades through a midplane. Each of the plurality of blades has one or more storage units each having a storage controller and storage memory. The system includes a switch fabric coupling the plurality of blades through the midplane, and each storage unit having a first end of a point-to-point communication pathway connecting to the midplane, the point-to-point communication pathway passing through an associated blade having the storage unit and bypassing the processor of the storage node of the associated blade.
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公开(公告)号:US11861188B2
公开(公告)日:2024-01-02
申请号:US17138885
申请日:2020-12-30
Applicant: PURE STORAGE, INC.
Inventor: Hari Kannan , Yuhong Mao , Mark Heuchert
CPC classification number: G06F3/0631 , G06F3/0604 , G06F3/067 , G06N3/02
Abstract: A storage system, blades, removable modules, and method of configuring a storage system are described. The storage system has blades with computing resources and storage resources. At least one of the blades has, or has added, one or more removable modules.
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公开(公告)号:US11789626B2
公开(公告)日:2023-10-17
申请号:US17955493
申请日:2022-09-28
Applicant: Pure Storage, Inc.
Inventor: Hari Kannan , Gordon James Coleman , Yijie Zhao , Peter E. Kirkpatrick , Robert Lee , Yuhong Mao , Boris Feigin
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0683 , G06F11/3495
Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
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公开(公告)号:US20220291837A1
公开(公告)日:2022-09-15
申请号:US17200037
申请日:2021-03-12
Applicant: PURE STORAGE, INC.
Inventor: Shuyi Shao , Yuhong Mao , Peter E. Kirkpatrick
IPC: G06F3/06
Abstract: Reading data stored at a free block of a storage device is read prior to allocating the free block for storage of data. A determination as to whether a number of bit flips of the data stored at the free block is below a threshold is made. The free block is added to a pool of active free blocks to be allocated for the storage of data upon determining that the number of bit flips of the data stored at the free block is below the threshold.
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公开(公告)号:US20220075547A1
公开(公告)日:2022-03-10
申请号:US17014783
申请日:2020-09-08
Applicant: PURE STORAGE, INC.
Inventor: Andrew R. Bernat , Grigori Inozemtsev , Gordon James Coleman , Yuhong Mao
IPC: G06F3/06
Abstract: A block of a storage device of a plurality of storage devices is allocated for storage of data, wherein the allocation comprises identifying a nonce associated with the block of the storage device. An erase command for the block is transmitted to the storage device, the erase command comprising the nonce, wherein the storage device is to erase the block upon determining that the nonce matches a corresponding nonce stored locally at the storage device.
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18.
公开(公告)号:US10454498B1
公开(公告)日:2019-10-22
申请号:US16164663
申请日:2018-10-18
Applicant: Pure Storage, Inc.
Inventor: Yuhong Mao
Abstract: A hardware compression system is provided. The system includes a hardware pipeline having a plurality of stages arranged to receive pre-compression data into a data buffer, populate a first hash table and a second hash table, supply the pre-compression data to a hash lookup module to access the first hash table and the second hash table in parallel, supply a string match module with results from the hash lookup module so that the string match module compares pre-compression data from multiple locations in the data buffer in parallel, supply a match merge module with results from the string match module so that the match merge module generates literals and metadata for compression data, and supply an output encoding module with results from the match merge module so that the output encoding module encodes the compression data.
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公开(公告)号:US12236117B2
公开(公告)日:2025-02-25
申请号:US18460269
申请日:2023-09-01
Applicant: PURE STORAGE, INC.
Inventor: Hari Kannan , Gordon James Coleman , Yijie Zhao , Peter E. Kirkpatrick , Robert Lee , Yuhong Mao , Boris Feigin
Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
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公开(公告)号:US11955187B2
公开(公告)日:2024-04-09
申请号:US17682677
申请日:2022-02-28
Applicant: PURE STORAGE, INC.
Inventor: Hari Kannan , Robert Lee , Yuhong Mao
IPC: G11C29/00 , G01R31/317 , G06F11/07 , G06F11/10 , G11C11/402 , G11C16/34 , H04L1/20 , G11C16/04
CPC classification number: G11C16/3427 , G01R31/3171 , G06F11/076 , G06F11/108 , G11C11/402 , G11C16/3418 , G11C16/3495 , H04L1/20 , G11C16/0483
Abstract: A method for processing blocks of flash memory to decrease raw bit errors from the flash memory is provided. The method includes identifying one or more blocks of the flash memory for a refresh operation and writing information regarding the identified blocks, to a data structure. The method includes issuing background reads to the identified blocks, according to the data structure, as the refresh operation. The method may be embodied on a computer readable medium. In some embodiments the background reads may be based on a time based refresh responsive to an increase in raw bit error count in the flash memory over time.
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