公开(公告)号：US20240421119A1

公开(公告)日：2024-12-19

申请号：US18336331

申请日：2023-06-16

Applicant: QUALCOMM Incorporated

Inventor： Yangyang Sun ,  Yue Li ,  Lily Zhao ,  Piyush Gupta ,  Xuefeng Zhang

IPC: H01L23/00

Abstract: Flexible under-bump metallization sizes and patterning, and related integrated circuit packages and fabrication methods are disclosed. First under-bump metallizations (UBMs) of a first, larger size and pitch are provided in the die and coupled to corresponding metal interconnects in the package substrate. One or more second UBMs of a second, reduced size UBMs can also be located in the core area of the die. This provides greater flexibility in the design and layout of the die, because different circuits within the die (e.g., I/O related circuits) may only require coupling to smaller size UBMs for performance requirements and thus can be more flexibility located in the die. Also, to further reduce pitch of the second, smaller size UBMs, one or more of the second, smaller size UBMs can be formed as oblong-shaped UBMs, which can still maintain a minimum separation based on metal interconnect pitch limitations in the package substrate.

公开(公告)号：US20240096845A1

公开(公告)日：2024-03-21

申请号：US17934023

申请日：2022-09-21

Applicant: QUALCOMM Incorporated

Inventor： Yangyang Sun ,  Dongming He ,  Yujen Chen

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L24/73 ,  H01L21/563 ,  H01L23/3171 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/16148 ,  H01L2224/1712 ,  H01L2224/27416 ,  H01L2224/27614 ,  H01L2224/29191 ,  H01L2224/3201 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/381 ,  H01L2924/3841

Abstract: Circuit packages with a polymer layer around the bump interconnects have a reduced number of shorts between the bump interconnects and have reduced underfill delamination. The circuit package includes a first component coupled to a second component through a plurality of bump interconnects employed for passing logic signals, data signals, and/or power. The bump interconnects extend from a surface of the first component and are coupled to contact pads on an opposing surface of the second component. The side surfaces of the bump interconnects extend in a direction from the second component to the first. The circuit package includes the polymer layer disposed on the surface of the first component around the bump interconnects and on the side surfaces of the bump interconnects. The polymer layer reduces shorts between the side surfaces of adjacent bump interconnects and reduces delamination of an underfill disposed between the first and second components.

公开(公告)号：US11380613B2

公开(公告)日：2022-07-05

申请号：US16888516

申请日：2020-05-29

Applicant: QUALCOMM Incorporated

Inventor： Yue Li ,  Li-Sheng Weng ,  Yangyang Sun

IPC: H01L23/50 ,  H01L23/00

Abstract: An integrated circuit (IC) package is described. The IC package includes a die, having a pad layer structure on back-end-of-line layers on a substrate. The die also includes a metallization routing layer on the pad layer structure, and a first under bump metallization layer on the metallization routing layer. The IC package also includes a patterned seed layer on a surface of the die to contact the first under bump metallization layer. The IC package further includes a first package bump on the first under bump metallization layer.