公开(公告)号：US07414462B2

公开(公告)日：2008-08-19

申请号：US11443405

申请日：2006-05-30

申请人： Divya Tripathi ,  Jaideep Banerjee ,  Qadeer A. Khan

发明人： Divya Tripathi ,  Jaideep Banerjee ,  Qadeer A. Khan

IPC分类号： G06G7/12 ,  G06G7/26

CPC分类号： H03K5/2481 ,  H03K3/35613

摘要： A differential receiver circuit receives a differential input signal including first and second input signals (DP, DM) and generates a single-ended output signal. The receiver circuit includes first and second comparators that receive the differential input signal and generate respective first and second differential output signals. A current summer is connected to the first and second comparators and receives the first and second differential output signals and generates a third differential output signal. A differential to single-ended converter is connected to the current summer and receives the third differential output signal and generates the single-ended output signal. The differential input signal varies from a ground voltage level to an external reference voltage level (VUSB), while the first and second comparators are made with devices that operate at an internal reference voltage level that is lower than the external reference voltage level.

摘要翻译： 差分接收器电路接收包括第一和第二输入信号（DP，DM）的差分输入信号，并产生单端输出信号。 接收器电路包括接收差分输入信号并产生相应的第一和第二差分输出信号的第一和第二比较器。 电流加法器连接到第一和第二比较器，并接收第一和第二差分输出信号并产生第三差分输出信号。 差分到单端转换器连接到当前的加法器，并接收第三个差分输出信号并产生单端输出信号。 差分输入信号从接地电压电平变化到外部参考电压电平（VUSB），而第一和第二比较器由在低于外部参考电压电平的内部参考电压电平工作的器件制成。

公开(公告)号：US20070279125A1

公开(公告)日：2007-12-06

申请号：US11443405

申请日：2006-05-30

申请人： Divya Tripathi ,  Jaideep Banerjee ,  Qadeer A. Khan

发明人： Divya Tripathi ,  Jaideep Banerjee ,  Qadeer A. Khan

IPC分类号： G06G7/12

CPC分类号： H03K5/2481 ,  H03K3/35613

摘要： A differential receiver circuit receives a differential input signal including first and second input signals (DP, DM) and generates a single-ended output signal. The receiver circuit includes first and second comparators that receive the differential input signal and generate respective first and second differential output signals. A current summer is connected to the first and second comparators and receives the first and second differential output signals and generates a third differential output signal. A differential to single-ended converter is connected to the current summer and receives the third differential output signal and generates the single-ended output signal. The differential input signal varies from a ground voltage level to an external reference voltage level (VUSB), while the first and second comparators are made with devices that operate at an internal reference voltage level that is lower than the external reference voltage level.

摘要翻译： 差分接收器电路接收包括第一和第二输入信号（DP，DM）的差分输入信号，并产生单端输出信号。 接收器电路包括接收差分输入信号并产生相应的第一和第二差分输出信号的第一和第二比较器。 电流加法器连接到第一和第二比较器，并接收第一和第二差分输出信号并产生第三差分输出信号。 差分到单端转换器连接到当前的加法器，并接收第三个差分输出信号并产生单端输出信号。 差分输入信号从接地电压电平变化到外部参考电压电平（VUSB），而第一和第二比较器由在低于外部参考电压电平的内部参考电压电平工作的器件制成。

公开(公告)号：US07292073B2

公开(公告)日：2007-11-06

申请号：US11443198

申请日：2006-05-30

申请人： Qadeer A. Khan ,  Divya Tripathi

发明人： Qadeer A. Khan ,  Divya Tripathi

IPC分类号： H03K3/00

CPC分类号： H03K17/164 ,  H03K19/00315

摘要： A transmission line driver circuit that operates at a first voltage level is fabricated using devices that operate at a second, lower voltage level. The driver circuit includes a ramp generator that receives a speed signal and a data signal and generates a charge ramp signal and a discharge ramp signal. A pair of series connected source follower transistors have their gates connected to respective charge and discharge signal outputs of the ramp generator. The driver circuit output signal is generated at an output node between the sources of the NMOS and PMOS source follower transistors. A charge_ls generator circuit provides a charge_ls signal and a discharge_ls generator circuit provides a discharge_ls signal. A pair of protection transistors includes a first NMOS protection transistor and a first PMOS protection transistor, which are connected in series with respective ones of the source follower transistors, and their gates are connected to respective ones of the charge and discharge signals. The pair of protection transistors prevents the voltage across the NMOS and PMOS source follower transistors from exceeding their breakdown voltages.

摘要翻译： 使用在第二低电压电平下工作的器件来制造在第一电压电平下操作的传输线驱动器电路。 驱动器电路包括斜坡发生器，其接收速度信号和数据信号，并产生电荷斜坡信号和放电斜坡信号。 一对串联连接的源极跟随器晶体管的栅极连接到斜坡发生器的相应充电和放电信号输出端。 在NMOS和PMOS源极跟随器晶体管的源极之间的输出节点处产生驱动器电路输出信号。 charge_ls发生器电路提供charge_ls信号，并且discharge_ls发生器电路提供discharge_ls信号。 一对保护晶体管包括与相应的源极跟随器晶体管串联连接的第一NMOS保护晶体管和第一PMOS保护晶体管，并且它们的栅极连接到相应的充电和放电信号。 一对保护晶体管防止NMOS和PMOS源极跟随器晶体管两端的电压超过其击穿电压。

公开(公告)号：US20080088340A1

公开(公告)日：2008-04-17

申请号：US11851381

申请日：2007-09-06

申请人： Sanjay GUPTA ,  Qadeer A. Khan

发明人： Sanjay GUPTA ,  Qadeer A. Khan

IPC分类号： H03K17/16

CPC分类号： H03K17/161 ,  G06F1/10 ,  H03K5/15013 ,  H03K17/145

摘要： A buffer includes a source follower module and a pull-up/pull-down module that is connected to the source follower module. An output signal at the output terminal of the source follower module follows an input signal at the input terminal with a predetermined delay, independent of the Miller capacitance. The pull-up/pull-down module pulls the output of source follower to supply/ground rail.

摘要翻译： 缓冲器包括源跟随器模块和连接到源极跟随器模块的上拉/下拉模块。 在源极跟随器模块的输出端处的输出信号以与预定的延迟无关的米勒电容跟随输入端的输入信号。 上拉/下拉模块将源极跟随器的输出端拉到电源/接地导轨。

公开(公告)号：US07400172B2

公开(公告)日：2008-07-15

申请号：US11851381

申请日：2007-09-06

申请人： Sanjay Gupta ,  Qadeer A. Khan

发明人： Sanjay Gupta ,  Qadeer A. Khan

IPC分类号： H03K19/0175 ,  H03K19/094

CPC分类号： H03K17/161 ,  G06F1/10 ,  H03K5/15013 ,  H03K17/145

摘要： A buffer includes a source follower module and a pull-up/pull-down module that is connected to the source follower module. An output signal at the output terminal of the source follower module follows an input signal at the input terminal with a predetermined delay, independent of the Miller capacitance. The pull-up/pull-down module pulls the output of source follower to supply/ground rail.

摘要翻译： 缓冲器包括源跟随器模块和连接到源极跟随器模块的上拉/下拉模块。 在源极跟随器模块的输出端处的输出信号以与预定的延迟无关的米勒电容跟随输入端的输入信号。 上拉/下拉模块将源极跟随器的输出端拉到电源/接地导轨。

公开(公告)号：US07388422B2

公开(公告)日：2008-06-17

申请号：US11441415

申请日：2006-05-25

申请人： Qadeer A. Khan ,  Hidetaka Fukazawa ,  Tushar S. Nandurkar

发明人： Qadeer A. Khan ,  Hidetaka Fukazawa ,  Tushar S. Nandurkar

IPC分类号： G06F1/10

CPC分类号： H02M3/07 ,  H03K2217/0063 ,  H03K2217/0081

摘要： A charge pump circuit for a high side drive circuit and a driver driving voltage circuit that stably output a voltage when input voltage is low. The charge pump circuit includes first and second transistors, first and second capacitors, and first to third diodes. The first capacitor has a high voltage side, connected to a load driving power supply voltage via the first diode, and a low voltage side, connected to the load driving power supply voltage via the first transistor or grounded via the second transistor driven in synchronization with the first transistor. The high voltage side is supplied, via the third diode, with a low side drive voltage that is as an output voltage of a low side charge pump, and functions to output high side drive voltage to a high side pre-driver circuit via the second diode.

摘要翻译： 用于高侧驱动电路的电荷泵电路和当输入电压低时稳定地输出电压的驱动器驱动电压电路。 电荷泵电路包括第一和第二晶体管，第一和第二电容器以及第一至第三二极管。 第一电容器具有高电压侧，经由第一二极管连接到负载驱动电源电压，以及低压侧，经由第一晶体管连接到负载驱动电源电压，或者经由与第一晶体管同步驱动的第二晶体管接地 第一个晶体管。 高压侧通过第三二极管供给作为低端电荷泵的输出电压的低侧驱动电压，并且用于通过第二二极管将高侧驱动电压输出到高侧预驱动器电路 二极管。