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公开(公告)号：US20070152739A1
公开(公告)日：2007-07-05
申请号：US11617770
申请日：2006-12-29
申请人： Jaideep Banerjee , Tushar Nandurkar
发明人： Jaideep Banerjee , Tushar Nandurkar
IPC分类号： G05F1/10
CPC分类号： G05F1/56
摘要： A power management system for managing power in an integrated circuit includes a controller and a voltage generator. The controller generates a control signal based on one or more process corners of the integrated circuit. The voltage generator generates a supply voltage based on the control signal, and provides the supply voltage to the integrated circuit to manage the power within the integrated circuit.
摘要翻译： 用于管理集成电路中的电力的电力管理系统包括控制器和电压发生器。 控制器基于集成电路的一个或多个处理角产生控制信号。 电压发生器基于控制信号产生电源电压，并且向集成电路提供电源电压以管理集成电路内的电力。
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公开(公告)号：US07414462B2
公开(公告)日：2008-08-19
申请号：US11443405
申请日：2006-05-30
申请人： Divya Tripathi , Jaideep Banerjee , Qadeer A. Khan
发明人： Divya Tripathi , Jaideep Banerjee , Qadeer A. Khan
CPC分类号： H03K5/2481 , H03K3/35613
摘要： A differential receiver circuit receives a differential input signal including first and second input signals (DP, DM) and generates a single-ended output signal. The receiver circuit includes first and second comparators that receive the differential input signal and generate respective first and second differential output signals. A current summer is connected to the first and second comparators and receives the first and second differential output signals and generates a third differential output signal. A differential to single-ended converter is connected to the current summer and receives the third differential output signal and generates the single-ended output signal. The differential input signal varies from a ground voltage level to an external reference voltage level (VUSB), while the first and second comparators are made with devices that operate at an internal reference voltage level that is lower than the external reference voltage level.
摘要翻译： 差分接收器电路接收包括第一和第二输入信号（DP，DM）的差分输入信号，并产生单端输出信号。 接收器电路包括接收差分输入信号并产生相应的第一和第二差分输出信号的第一和第二比较器。 电流加法器连接到第一和第二比较器，并接收第一和第二差分输出信号并产生第三差分输出信号。 差分到单端转换器连接到当前的加法器，并接收第三个差分输出信号并产生单端输出信号。 差分输入信号从接地电压电平变化到外部参考电压电平（VUSB），而第一和第二比较器由在低于外部参考电压电平的内部参考电压电平工作的器件制成。
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公开(公告)号：US20070279125A1
公开(公告)日：2007-12-06
申请号：US11443405
申请日：2006-05-30
申请人： Divya Tripathi , Jaideep Banerjee , Qadeer A. Khan
发明人： Divya Tripathi , Jaideep Banerjee , Qadeer A. Khan
IPC分类号： G06G7/12
CPC分类号： H03K5/2481 , H03K3/35613
摘要： A differential receiver circuit receives a differential input signal including first and second input signals (DP, DM) and generates a single-ended output signal. The receiver circuit includes first and second comparators that receive the differential input signal and generate respective first and second differential output signals. A current summer is connected to the first and second comparators and receives the first and second differential output signals and generates a third differential output signal. A differential to single-ended converter is connected to the current summer and receives the third differential output signal and generates the single-ended output signal. The differential input signal varies from a ground voltage level to an external reference voltage level (VUSB), while the first and second comparators are made with devices that operate at an internal reference voltage level that is lower than the external reference voltage level.
摘要翻译： 差分接收器电路接收包括第一和第二输入信号（DP，DM）的差分输入信号，并产生单端输出信号。 接收器电路包括接收差分输入信号并产生相应的第一和第二差分输出信号的第一和第二比较器。 电流加法器连接到第一和第二比较器，并接收第一和第二差分输出信号并产生第三差分输出信号。 差分到单端转换器连接到当前的加法器，并接收第三个差分输出信号并产生单端输出信号。 差分输入信号从接地电压电平变化到外部参考电压电平（VUSB），而第一和第二比较器由在低于外部参考电压电平的内部参考电压电平工作的器件制成。
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公开(公告)号：US09030186B2
公开(公告)日：2015-05-12
申请号：US13547042
申请日：2012-07-12
CPC分类号： G05F3/30 , Y10S323/901
摘要： A bandgap voltage reference and voltage regulator system includes a bandgap voltage reference circuit and a voltage regulator circuit that share a single, common amplifier. The amplifier acts as a gain stage for the reference circuit and as an error amplifier for a driver stage of the regulator circuit. The regulator circuit has an input reference generated by the reference circuit, and the reference circuit acts as a load to the driver stage, obviating the need for a bias resistance network. By sharing the amplifier and obviating the need for a resistance network, the area and overall quiescent current of the system are reduced. The system can be implemented in CMOS/BiCMOS technology and is suited for low power applications.
摘要翻译： 带隙电压参考和电压调节器系统包括带隙电压参考电路和共享单个公共放大器的电压调节器电路。 该放大器用作参考电路的增益级，并用作调节器电路的驱动级的误差放大器。 调节器电路具有由参考电路产生的输入参考，并且参考电路充当驱动器级的负载，从而避免了对偏置电阻网络的需要。 通过共享放大器和消除对电阻网络的需求，系统的面积和整体静态电流降低。 该系统可以采用CMOS / BiCMOS技术实现，适用于低功耗应用。
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公开(公告)号：US07135842B2
公开(公告)日：2006-11-14
申请号：US11047494
申请日：2005-01-31
IPC分类号： G05F1/565
CPC分类号： G05F1/56
摘要： A regulated power source for supplying power to an external circuit includes a voltage sensing circuit and a voltage regulator. The voltage sensing circuit generates a feedback voltage by comparing voltage drops at a plurality of sense points within the external circuit. The feedback voltage is based on the maximum voltage drop at the sense points. The voltage regulator regulates the voltage supplied to the external circuit in accordance with the feedback voltage.
摘要翻译： 用于向外部电路供电的稳压电源包括电压感测电路和电压调节器。 电压感测电路通过比较外部电路内的多个感测点处的电压降来产生反馈电压。 反馈电压基于感测点处的最大电压降。 电压调节器根据反馈电压调节提供给外部电路的电压。
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公开(公告)号：US20060170402A1
公开(公告)日：2006-08-03
申请号：US11047494
申请日：2005-01-31
申请人： Jaideep Banerjee , Tushar Nandurkar
发明人： Jaideep Banerjee , Tushar Nandurkar
CPC分类号： G05F1/56
摘要： A regulated power source for supplying power to an external circuit includes a voltage sensing circuit and a voltage regulator. The voltage sensing circuit generates a feedback voltage by comparing voltage drops at a plurality of sense points within the external circuit. The feedback voltage is based on the maximum voltage drop at the sense points. The voltage regulator regulates the voltage supplied to the external circuit in accordance with the feedback voltage.
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7.发明申请公开(公告)号：US20140015509A1
公开(公告)日：2014-01-16
申请号：US13547042
申请日：2012-07-12
IPC分类号： G05F3/16
CPC分类号： G05F3/30 , Y10S323/901
摘要： A bandgap voltage reference and voltage regulator system includes a bandgap voltage reference circuit and a voltage regulator circuit that share a single, common amplifier. The amplifier acts as a gain stage for the reference circuit and as an error amplifier for a driver stage of the regulator circuit. The regulator circuit has an input reference generated by the reference circuit, and the reference circuit acts as a load to the driver stage, obviating the need for a bias resistance network. By sharing the amplifier and obviating the need for a resistance network, the area and overall quiescent current of the system are reduced. The system can be implemented in CMOS/BiCMOS technology and is suited for low power applications.
摘要翻译： 带隙电压参考和电压调节器系统包括带隙电压参考电路和共享单个公共放大器的电压调节器电路。 该放大器用作参考电路的增益级，并用作调节器电路的驱动级的误差放大器。 调节器电路具有由参考电路产生的输入参考，并且参考电路充当驱动器级的负载，从而避免了对偏置电阻网络的需要。 通过共享放大器和消除对电阻网络的需求，系统的面积和整体静态电流降低。 该系统可以采用CMOS / BiCMOS技术实现，适用于低功耗应用。
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8.发明申请公开(公告)号：US20050168272A1
公开(公告)日：2005-08-04
申请号：US10770149
申请日：2004-02-02
申请人： Jaideep Banerjee , Tushar Nandurkar
发明人： Jaideep Banerjee , Tushar Nandurkar
CPC分类号： G05F1/565
摘要： A low drop out voltage regulator (10) that receives an input voltage and generates a substantially constant output voltage includes a gain stage (12), a buffer stage (14), an output driver transistor (16), and first and second load current sense circuits (18, 20). The first load current sense circuit is connected between the output driver transistor and the buffer stage and adaptively increases a bias current of the buffer stage as a function of the load current. The second load current sense circuit is connected between the output driver transistor and the gain stage and adaptively decreases a bias current of the gain stage as the load current increases.
摘要翻译： 接收输入电压并产生基本上恒定的输出电压的低压降稳压器（10）包括增益级（12），缓冲级（14），输出驱动晶体管（16）和第一和第二负载电流 感测电路（18,20）。 第一负载电流检测电路连接在输出驱动晶体管和缓冲级之间，并根据负载电流自适应地增加缓冲级的偏置电流。 第二负载电流检测电路连接在输出驱动晶体管和增益级之间，随着负载电流的增加自适应地减小增益级的偏置电流。
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9.发明授权公开(公告)号：US06933772B1
公开(公告)日：2005-08-23
申请号：US10770149
申请日：2004-02-02
CPC分类号： G05F1/565
摘要： A low drop out voltage regulator (10) that receives an input voltage and generates a substantially constant output voltage includes a gain stage (12), a buffer stage (14), an output driver transistor (16), and first and second load current sense circuits (18, 20). The first load current sense circuit is connected between the output driver transistor and the buffer stage and adaptively increases a bias current of the buffer stage as a function of the load current. The second load current sense circuit is connected between the output driver transistor and the gain stage and adaptively decreases a bias current of the gain stage as the load current increases.
摘要翻译： 接收输入电压并产生基本上恒定的输出电压的低压降稳压器（10）包括增益级（12），缓冲级（14），输出驱动晶体管（16）和第一和第二负载电流 感测电路（18,20）。 第一负载电流检测电路连接在输出驱动晶体管和缓冲级之间，并根据负载电流自适应地增加缓冲级的偏置电流。 第二负载电流检测电路连接在输出驱动晶体管和增益级之间，随着负载电流的增加自适应地减小增益级的偏置电流。
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