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公开(公告)号：US20170338817A1
公开(公告)日：2017-11-23
申请号：US15612455
申请日：2017-06-02
Applicant: Rambus Inc.
Inventor： Huy Nguyen
CPC classification number: H03K19/0005 , H04B1/0458 , H04L25/0278 , H04L25/0298
Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.
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公开(公告)号：US20210297079A1
公开(公告)日：2021-09-23
申请号：US17235283
申请日：2021-04-20
Applicant: Rambus Inc.
Inventor： Huy Nguyen
Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.
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公开(公告)号：US09685951B2
公开(公告)日：2017-06-20
申请号：US15134513
申请日：2016-04-21
Applicant: Rambus Inc.
Inventor： Huy Nguyen
CPC classification number: H03K19/0005 , H04B1/0458 , H04L25/0278 , H04L25/0298
Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.
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Patent Agency Ranking
公开(公告)号：US20160233864A1
公开(公告)日：2016-08-11
申请号：US15134513
申请日：2016-04-21
Applicant: Rambus Inc.
Inventor： Huy Nguyen
CPC classification number: H03K19/0005 , H04B1/0458 , H04L25/0278 , H04L25/0298
Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.
Abstract translation: 描述的是具有差分接收器的集成电路管芯，其输入端耦合到外部信号焊盘。 耦合到信号焊盘的端接脚支持多个端接拓扑。 这些端接支腿可以支持可调节的阻抗，电容或两者，这可以使用集成的存储器进行控制。
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公开(公告)号：US20190273498A1
公开(公告)日：2019-09-05
申请号：US16290749
申请日：2019-03-01
Applicant: Rambus Inc.
Inventor： Huy Nguyen
Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.
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公开(公告)号：US10236882B2
公开(公告)日：2019-03-19
申请号：US15612455
申请日：2017-06-02
Applicant: Rambus Inc.
Inventor： Huy Nguyen
Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.
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公开(公告)号：US20140139261A1
公开(公告)日：2014-05-22
申请号：US13906219
申请日：2013-05-30
Applicant: Rambus Inc
Inventor： Huy Nguyen
IPC: H04L25/02
CPC classification number: H03K19/0005 , H04B1/0458 , H04L25/0278 , H04L25/0298
Abstract: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.
Abstract translation: 描述的是具有差分接收器的集成电路管芯，其输入端耦合到外部信号焊盘。 耦合到信号焊盘的端接脚支持多个端接拓扑。 这些端接支腿可以支持可调节的阻抗，电容或两者，这可以使用集成的存储器进行控制。
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18.发明申请公开(公告)号：US20130290766A1
公开(公告)日：2013-10-31
申请号：US13867954
申请日：2013-04-22
Applicant: RAMBUS INC.
Inventor： Huy Nguyen , Vijay Gadde , Kambiz Kaviani , Thomas Giovannini , Todd Bystrom
IPC: G06F1/12
CPC classification number: G06F1/12
Abstract: A source-synchronous communication system in which a first integrated circuit (IC) conveys a data signal and concomitant strobe signal to a second IC. One or both ICs support hysteresis for the strobe channel that allows the second IC to distinguish between strobe preambles and noise, and thus prevent the false triggering of data capture. Hysteresis may also be employed to quickly settle the strobe channel to an inactive level after receipt of a strobe postamble.
Abstract translation: 一种源同步通信系统，其中第一集成电路（IC）向第二IC传送数据信号和伴随选通信号。 一个或两个IC支持选通通道的滞后，允许第二IC区分选通前导和噪声，从而防止数据捕获的错误触发。 还可以采用迟滞来在接收到选通后同步码之后快速地将频闪通道置于非活动状态。
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