公开(公告)号：US20160352098A1

公开(公告)日：2016-12-01

申请号：US15079554

申请日：2016-03-24

Applicant: RF Micro Devices, Inc.

Inventor： Muhammad Iqbal Chaudhry ,  Nathaniel Peachey

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: Aspects disclosed herein include trigger circuitry for electrostatic discharge (ESD) protection. In this regard, in one aspect, an ESD protection circuit is provided to protect an integrated circuit (IC) from an ESD event. Trigger circuitry, which includes a voltage divider for example, divides a voltage spike between a supply rail and a ground rail to provide a trigger voltage. An ESD clamping circuitry is activated to discharge the voltage spike when the trigger voltage is determined to exceed an ESD threshold voltage, thus protecting the IC from being damaged by the voltage spike. By activating the ESD clamping circuitry based on the trigger voltage divided from the voltage spike, it is possible to adapt the ESD protection circuit to provide ESD protection based on different ESD threshold voltages, thus making it possible to deploy the ESD protection circuit on ICs having different ESD protection requirements.

Abstract translation: 本文公开的方面包括用于静电放电（ESD）保护的触发电路。 在这方面，在一个方面，提供ESD保护电路以保护集成电路（IC）免受ESD事件的影响。 例如，包括分压器的触发电路在电源轨和接地轨之间划分电压尖峰以提供触发电压。 当触发电压被确定为超过ESD阈值电压时，ESD钳位电路被激活以放电电压尖峰，从而保护IC免受电压尖峰损坏。 通过基于从电压尖峰开始的触发电压激活ESD钳位电路，可以使ESD保护电路适应于基于不同ESD阈值电压的ESD保护，从而可以将ESD保护电路部署在具有 不同的ESD保护要求。

公开(公告)号：US20140347121A1

公开(公告)日：2014-11-27

申请号：US14455346

申请日：2014-08-08

Applicant: RF Micro Devices, Inc.

Inventor： Nathaniel Peachey ,  Ralph Christopher Nieri

IPC: G05F3/20

CPC classification number: G05F3/205 ,  G05F3/16

Abstract: Self-biasing transistor switching circuitry includes a main transistor, a biasing transistor, a first capacitor, and a second capacitor. The body of the main transistor is isolated from the gate, the drain, and the source of the main transistor by an insulating layer. The first capacitor is coupled between the source and the gate of the main transistor. The second capacitor is coupled between the source and the body of the main transistor. The body and the drain of the main transistor are coupled together. The gate and the drain of the biasing transistor are coupled to the gate of the main transistor. The drain of the biasing transistor is coupled to the drain of the main transistor. The self-biasing transistor switching circuitry is adapted to receive an oscillating signal at the drain of the main transistor, and use the oscillating signal to appropriately bias the main transistor.

公开(公告)号：US08830767B2

公开(公告)日：2014-09-09

申请号：US13929933

申请日：2013-06-28

Applicant: RF Micro Devices, Inc.

Inventor： Nathaniel Peachey ,  Joseph Hubert Colles ,  Jeffrey D. Potts

IPC: G11C7/10 ,  G11C5/14 ,  G11C5/02 ,  G11C5/06 ,  G11C7/12 ,  G11C13/04

CPC classification number: G11C7/12 ,  G11C5/02 ,  G11C5/06 ,  G11C5/147 ,  G11C7/02 ,  G11C7/1051 ,  G11C7/1078 ,  G11C7/22 ,  G11C13/04 ,  H01L23/60 ,  H01L2924/0002 ,  H02H9/041 ,  H01L2924/00

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.

公开(公告)号：US20130286519A1

公开(公告)日：2013-10-31

申请号：US13929950

申请日：2013-06-28

Applicant: RF Micro Devices, Inc.

Inventor： Nathaniel Peachey ,  Joseph Hubert Colles ,  Jeffrey D. Potts

IPC: H01L23/60

CPC classification number: G11C7/12 ,  G11C5/02 ,  G11C5/06 ,  G11C5/147 ,  G11C7/02 ,  G11C7/1051 ,  G11C7/1078 ,  G11C7/22 ,  G11C13/04 ,  H01L23/60 ,  H01L2924/0002 ,  H02H9/041 ,  H01L2924/00

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.