公开(公告)号：US20080007315A1

公开(公告)日：2008-01-10

申请号：US11756651

申请日：2007-06-01

Applicant: Rei-Fu Huang ,  Shih-huang Huang

Inventor： Rei-Fu Huang ,  Shih-huang Huang

IPC: H03B1/00

CPC classification number: H03K19/018528

Abstract: The disclosure relates to a voltage converter, converting a first signal of a first voltage to output a second signal of a second voltage. A level shifter receives the first signal to generate the second signal. An isolation circuit is coupled to the output of the level shifter, passing the second signal out. When the input of voltage converter is floated, the isolation circuit stops passing the second signal as the output, instead, the isolation circuit outputs a substitution signal having a predetermined voltage level irrelevant to the input of the level shifter.

Abstract translation: 本公开涉及电压转换器，转换第一电压的第一信号以输出第二电压的第二信号。 电平移位器接收第一信号以产生第二信号。 隔离电路耦合到电平移位器的输出端，使第二信号通过。 当电压转换器的输入浮起时，隔离电路停止通过第二信号作为输出，而是隔离电路输出具有与电平移位器的输入无关的预定电压电平的置换信号。

公开(公告)号：US20070171703A1

公开(公告)日：2007-07-26

申请号：US11558297

申请日：2006-11-09

Applicant: Rei-Fu Huang ,  Young-Shying Chen ,  Chien-Chung Hung ,  Yuan-Jen Lee ,  Ming-Jer Kao

Inventor： Rei-Fu Huang ,  Young-Shying Chen ,  Chien-Chung Hung ,  Yuan-Jen Lee ,  Ming-Jer Kao

IPC: G11C11/00

CPC classification number: G11C11/16

Abstract: A current source for magnetic random access memory (MRAM) is provided, including a band-gap reference circuit, a first stage buffer, and a plurality of second stage buffers. The band-gap reference circuit provides an output reference voltage which is locked by the first stage buffer. The plurality of second stage buffers generate a stable voltage in response to the locked voltage, so as to provide a current for the conducting wire after being converted, such that magnetic memory cell changes its memory state in response to the current. The current source may reduce the discharge time under the operation of biphase current, so as to raise the operating speed. Further, the circuit area of the current source for the MRAM is also reduced. The operation of multiple write wires may be provided simultaneously to achieve parallel write.

Abstract translation: 提供了一种用于磁随机存取存储器（MRAM）的电流源，包括带隙参考电路，第一级缓冲器和多个第二级缓冲器。 带隙基准电路提供由第一级缓冲器锁定的输出参考电压。 多个第二级缓冲器响应于锁定电压产生稳定的电压，以便在转换之后为导线提供电流，使得磁存储单元响应于电流来改变其存储状态。 电流源可以减少双相电流运行时的放电时间，从而提高运行速度。 此外，MRAM的电流源的电路面积也减小。 可以同时提供多条写入线的操作以实现并行写入。

公开(公告)号：US08134854B2

公开(公告)日：2012-03-13

申请号：US12277495

申请日：2008-11-25

Applicant: Rei-Fu Huang

Inventor： Rei-Fu Huang

IPC: G11C17/00

CPC classification number: H01H37/761 ,  H01H85/0241 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: An exemplary embodiment of an efuse device is provided, operating in a write mode and a read mode and comprising a source line, a cell, a blow device, and a sensing circuit. The cell has a first terminal coupled to the source line and a second terminal. The blow device is coupled between the second terminal of the cell and a ground terminal. The blow device is turned on in the read mode. The sensing circuit is coupled to the first terminal of the cell and the ground terminal, and is arranged to determine a state of the cell.

Abstract translation: 提供了以写入模式和读取模式操作并且包括源极线，电池，吹风装置和感测电路的充电装置的示例性实施例。 电池具有耦合到源极线的第一端子和第二端子。 吹风装置连接在电池的第二端子和接地端子之间。 吹扫装置在读取模式下打开。 感测电路耦合到单元的第一端子和接地端子，并且被布置成确定单元的状态。

公开(公告)号：US08050129B2

公开(公告)日：2011-11-01

申请号：US12491247

申请日：2009-06-25

Applicant: Chia-Hsien Liu ,  Rei-Fu Huang ,  Chien-Chung Chen ,  Che-Yuan Jao

Inventor： Chia-Hsien Liu ,  Rei-Fu Huang ,  Chien-Chung Chen ,  Che-Yuan Jao

IPC: G11C7/00

CPC classification number: G04B37/0481 ,  G04B19/065

Abstract: An electrically programmable fuse (e-fuse) apparatus includes an e-fuse macro and a switch device. The e-fuse macro is disposed in an integrated circuit, and has a plurality of e-fuse units. The switch device is disposed in the integrated circuit, and has an output node coupled to the e-fuse units and a first input node coupled to a first power source which supplies a first reference voltage acting as a programming voltage of the e-fuse macro. The switch device connects the first power source to the e-fuse units when the e-fuse macro is operated under a programming mode.

Abstract translation: 电可编程保险丝（e-fuse）装置包括电子熔丝宏和开关装置。 电子熔丝宏设置在集成电路中，并且具有多个电子熔丝单元。 开关装置设置在集成电路中，并且具有耦合到电子熔丝单元的输出节点和耦合到第一电源的第一输入节点，第一电源提供充当电子熔丝宏的编程电压的第一参考电压 。 当在编程模式下操作电子熔丝宏时，开关装置将第一电源连接到电子熔丝单元。

公开(公告)号：US20090039462A1

公开(公告)日：2009-02-12

申请号：US12128650

申请日：2008-05-29

Applicant: Rei-Fu Huang

Inventor： Rei-Fu Huang

IPC: H01H37/76 ,  H01L21/00

CPC classification number: G11C17/16 ,  G11C17/18

Abstract: An exemplary embodiment of an efuse device is provided and comprises a plurality of word lines, at least one bit line, a plurality of cells, a plurality of first selection devices, and at least one second selection device. The word lines are interlaced with the bit line. The cells are disposed in an array, and each corresponds to one set of the interlaced word line and bit line. Each first selection device is coupled to one of the word lines, and the second selection device is coupled to the bit line.

Abstract translation: 提供了一种efuse设备的示例性实施例，并且包括多个字线，至少一个位线，多个单元，多个第一选择装置和至少一个第二选择装置。 字线与位线交错。 单元被布置成阵列，并且每个单元对应于一组隔行字线和位线。 每个第一选择装置耦合到字线中的一个，并且第二选择装置耦合到位线。

公开(公告)号：US20070288807A1

公开(公告)日：2007-12-13

申请号：US11742567

申请日：2007-04-30

Applicant: Cheng-Wen Wu ,  Rei-Fu Huang ,  Chin-Lung Su ,  Wen-Ching Wu ,  Kun-Lun Luo

Inventor： Cheng-Wen Wu ,  Rei-Fu Huang ,  Chin-Lung Su ,  Wen-Ching Wu ,  Kun-Lun Luo

IPC: G11C29/12

CPC classification number: G11C29/44 ,  G11C29/4401 ,  G11C29/72

Abstract: Disclosed is a build-in self-diagnosis and repair method and apparatus in a memory with syndrome identification. It applies a fail-pattern identification and a syndrome-format structure to identify at least one type of faulty syndrome in the memory during a memory testing, then generates and exports fault syndrome information associated with the corresponding faulty syndrome. According to the fault syndrome information, the method applies a redundancy analysis algorithm, allocates spare memory elements and repairs the faulty cells in the memory. The syndrome-format structure respectively applies single-faulty-word-syndrome format, faulty-row-segment-syndrome format, and faulty-column-segment-syndrome format for different faulty syndromes, such as faulty row segments and single faulty words, faulty column segments and single faulty words, all of single faulty words, faulty row segments and faulty column segments, and so on.

Abstract translation: 公开了一种在具有综合征识别的记忆中的内置自诊断和修复方法和装置。 它在存储器测试期间应用故障模式识别和综合征格式结构来识别存储器中的至少一种类型的故障综合征，然后产生并输出与相应的故障综合征相关的故障综合征信息。 根据故障综合信息，该方法应用冗余分析算法，分配备用存储器元件并修复存储器中的故障单元。 综合征格式结构分别针对不良故障综合征，如有缺陷的行段和单一故障字，分别应用单故障字综合征格式，故障行段综合征格式和故障列段综合征格式， 列段和单个故障单词，所有单个故障字，故障行段和故障列段等。