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11.发明授权公开(公告)号：US07797588B2
公开(公告)日：2010-09-14
申请号：US12024637
申请日：2008-02-01
IPC分类号： G06F11/00 , G06F15/167
摘要： In a global shared memory (GSM) environment, an initiating task at a first node with a host fabric interface (HFI) uses epochs to provide reliability of transmission of packets via a network fabric to a target task. The HFI generates a packet for the initiating task addressed to the target task, and automatically inserts a current epoch of the initiating task into the packet. A copy of the current epoch is maintained by the target task, which accepts for processing only packets having the correct epoch, unless the packet is tagged for guaranteed-once delivery. When a packet delivery is accepted, the target task sends a notification to the initiating task. If the initiating task does not receive the notification of delivery for the issued packet, the initiating task updates the epoch at both the target node and the initiating node and re-transmits the packet.
摘要翻译： 在全球共享存储器（GSM）环境中，具有主机结构接口（HFI）的第一节点处的发起任务使用时代来提供经由网络结构向目标任务发送分组的可靠性。 HFI生成一个寻址到目标任务的启动任务的数据包，并自动将当前时刻的启动任务插入到数据包中。 目标任务的副本由目标任务维护，目标任务仅接受处理具有正确时期的分组，除非分组被标记为保证一次传递。 当接收到分组传递时，目标任务向发起任务发送通知。 如果发起任务没有接收到所发送的分组的传送通知，则起始任务在目标节点和发起节点两者处更新历元，并重新发送分组。
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公开(公告)号：US20090198975A1
公开(公告)日：2009-08-06
申请号：US12024546
申请日：2008-02-01
申请人： Ravi K. Arimilli , Robert S. Blackmore , Ronald N. Kalla , Chulho Kim , Balaram Sinharoy , Hanhong Xue
发明人： Ravi K. Arimilli , Robert S. Blackmore , Ronald N. Kalla , Chulho Kim , Balaram Sinharoy , Hanhong Xue
IPC分类号： G06F9/315
CPC分类号： G06F9/30043 , G06F9/30032 , G06F9/3834 , G06F9/3885
摘要： A data processing system has a processor, a memory, and an instruction set architecture (ISA) that includes: (1) an asynchronous memory mover (AMM) store (ST) instruction initiates an asynchronous memory move operation that moves data from a first memory location having a first real address to a second memory location having a second real address by: (a) first performing a move of the data in virtual address space utilizing a source effective address a destination effective address; and (b) when the move is completed, completing a physical move of the data to the second memory location, independent of the processor. The ISA further provides (2) an AMM terminate ST instruction for stopping an ongoing AMM operation before completion of the AMM operation, and (3) a LD CMP instruction for checking a status of an AMM operation.
摘要翻译： 数据处理系统具有处理器，存储器和指令集架构（ISA），其包括：（1）异步存储器移动器（AMM）存储器（ST）指令发起异步存储器移动操作，其将数据从第一存储器 具有通过以下方式具有第二实际地址的具有第一实际地址的位置：（a）首先使用源有效地址执行虚拟地址空间中的数据移动目的地有效地址; 和（b）当移动完成时，完成数据到第二存储器位置的物理移动，而与处理器无关。 ISA进一步提供（2）在完成AMM操作之前停止正在进行的AMM操作的AMM终止ST指令，以及（3）用于检查AMM操作状态的LD CMP指令。
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13.发明申请LAUNCHING MULTIPLE CONCURRENT MEMORY MOVES VIA A FULLY ASYNCHRONOOUS MEMORY MOVER 失效启动多个同时存储器通过充分的异步存储器移动公开(公告)号：US20090198939A1
公开(公告)日：2009-08-06
申请号：US12024690
申请日：2008-02-01
IPC分类号： G06F12/02
CPC分类号： G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3836 , G06F9/3851 , G06F12/10
摘要： A data processing system has an asynchronous memory mover, which includes multiple sets of registers for storing addressing and control parameters utilized to generate one or more asynchronous memory move (AMM) operations. The memory mover detects a receipt of a first set of parameters in a first set of registers from the processor. The processor forwards the parameters after the processor initiates a data move in virtual address space, utilizing a source effective address and a destination effective address. The memory mover responds to receiving the first set of parameters by generating and launching a first asynchronous memory move (AMM) operation. When the memory mover receives a second set of parameters in a second set of registers before the first AMM operation completes, the memory mover generates and launches a second AMM operation concurrently with the first AMM operation if no address conflicts exist.
摘要翻译： 数据处理系统具有异步存储器移动器，其包括用于存储用于生成一个或多个异步存储器移动（AMM）操作的寻址和控制参数的多组寄存器。 存储器移动器检测来自处理器的第一组寄存器中的第一组参数的接收。 处理器在虚拟地址空间中启动数据移动后，使用源有效地址和目标有效地址，处理器转发参数。 存储器移动器响应于通过生成和启动第一异步存储器移动（AMM）操作来接收第一组参数。 当存储器移动器在第一个AMM操作完成之前在第二组寄存器中接收到第二组参数时，如果不存在地址冲突，则存储器移动器生成并与第一个AMM操作同时启动第二个AMM操作。
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14.发明申请METHOD FOR ENABLING DIRECT PREFETCHING OF DATA DURING ASYCHRONOUS MEMORY MOVE OPERATION 失效用于在异步存储器运行期间实现数据的直接预先提取的方法公开(公告)号：US20090198908A1
公开(公告)日：2009-08-06
申请号：US12024598
申请日：2008-02-01
IPC分类号： G06F12/00
CPC分类号： G06F12/0862 , G06F9/30032 , G06F9/3004 , G06F9/30043 , G06F9/30076 , G06F9/30087 , G06F9/3017 , G06F9/30185 , G06F9/3834 , G06F9/3877
摘要： While an AMM operation is ongoing, a prefetch request for data from the source effective address or the destination effective address triggers a cache injection by the AMM mover (or memory controller) of relevant data from the stream of data being moved in the physical memory. The memory controller forwards the first prefetched line to the prefetch engine and L1 cache. The memory controller also forwards the next cache lines in the sequence of data to the L2 cache and a subsequent set of cache lines to the L3 cache. The memory controller then forwards the remaining data to the destination memory location. Quick access to prefetch data is enabled by buffering the stream of data in the upper caches rather than placing all the moved data within the memory. Also, the memory controller does not overrun the upper caches, by placing moved data into only a subset of the available cache lines of the upper level cache.
摘要翻译： 当AMM操作正在进行时，来自源有效地址或目的地有效地址的数据的预取请求触发AMM移动器（或存储器控制器）从在物理存储器中移动的数据流中的相关数据的高速缓存注入。 存储器控制器将第一预取行转发到预取引擎和L1缓存。 存储器控制器还将数据序列中的下一个高速缓存行转发到L2高速缓存以及随后的一组高速缓存行到L3高速缓存。 存储器控制器然后将剩余的数据转发到目的地存储器位置。 通过缓存高速缓存中的数据流，而不是将所有移动的数据放在内存中，可以快速访问预取数据。 此外，通过将移动的数据仅放置在高级缓存的可用高速缓存行的一部分中，存储器控制器不会超过上部高速缓存。
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15.发明申请公开(公告)号：US20090153897A1
公开(公告)日：2009-06-18
申请号：US11958668
申请日：2007-12-18
IPC分类号： G06F3/12
CPC分类号： G06F9/5016 , G06F12/0284 , G06F12/109 , G06F2212/656
摘要： A method of operating a data processing system includes each of multiple tasks within a parallel job executing on multiple nodes of the data processing system issuing a respective system call to request reservation, without allocation of backing storage in physical memory, of a global address space defined by a range of effective addresses as global shared memory accessible to all of the multiple tasks within the parallel job. At least two of the tasks within the parallel job allocate global address spaces including a same effective address.
摘要翻译： 一种操作数据处理系统的方法包括在数据处理系统的多个节点上执行的并行作业中的每个，发出相应的系统调用以请求预留，而不在物理存储器中分配备份存储器，以定义全局地址空间 通过一系列有效地址作为并行作业内的所有多个任务可访问的全局共享内存。 并行作业中的至少两个任务分配全局地址空间，包括相同的有效地址。
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公开(公告)号：US07493436B2
公开(公告)日：2009-02-17
申请号：US11553229
申请日：2006-10-26
IPC分类号： G06F9/48
CPC分类号： G06F9/5077 , G06F9/4812 , G06F9/4843 , G06F9/5027 , G06F2209/5018
摘要： Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information processing system in a simultaneous multi-threading mode. At least a first logical processor and a second logical processor associated with the at least one physical processor are partitioned. The first logical processor is assigned to manage interrupts and the second logical processor is assigned to dispatch runnable user threads.
摘要翻译： 公开了一种用于管理中断的方法，信息处理系统和计算机可读介质。 该方法包括将信息处理系统的至少一个物理处理器置于同时多线程模式中。 至少与至少一个物理处理器相关联的第一逻辑处理器和第二逻辑处理器被分区。 分配第一个逻辑处理器来管理中断，第二个逻辑处理器被分配给调度可运行的用户线程。
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17.发明授权公开(公告)号：US08214424B2
公开(公告)日：2012-07-03
申请号：US12424837
申请日：2009-04-16
IPC分类号： G06F15/16
CPC分类号： G06F9/542 , G06F9/546 , G06F11/1443 , G06F2209/546
摘要： A data processing system is programmed to provide a method for enabling user-level one-to-all message/messaging (OTAM) broadcast within a distributed parallel computing environment in which multiple threads of a single job execute on different processing nodes across a network. The method comprises: generating one or more messages for transmission to at least one other processing node accessible via a network, where the messages are generated by/for a first thread executing at the data processing system (first processing node) and the other processing node executes one or more second threads of a same parallel job as the first thread. An OTAM broadcast is transmitting via a host fabric interface (HFI) of the data processing system as a one-to-all broadcast on the network, whereby the messages are transmitted to a cluster of processing nodes across the network that execute threads of the same parallel job as the first thread.
摘要翻译： 数据处理系统被编程为提供一种在分布式并行计算环境中实现用户级一对一消息/消息传递（OTAM）广播的方法，其中单个作业的多个线程在跨越网络的不同处理节点上执行。 该方法包括：生成一个或多个消息以便传输到经由网络可访问的至少一个其他处理节点，其中消息由数据处理系统（第一处理节点）执行的第一个线程生成，另一个处理节点 执行与第一线程相同的并行作业的一个或多个第二线程。 OTAM广播通过数据处理系统的主机结构接口（HFI）作为网络上的一对一广播进行发送，由此将消息传送到跨网络的处理节点群集，该群集执行相同的线程 并行作为第一个线程。
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18.发明授权Launching multiple concurrent memory moves via a fully asynchronoous memory mover 失效通过完全异步的内存移动器启动多个并发内存移动公开(公告)号：US08015380B2
公开(公告)日：2011-09-06
申请号：US12024690
申请日：2008-02-01
CPC分类号： G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3836 , G06F9/3851 , G06F12/10
摘要： A data processing system has an asynchronous memory mover, which includes multiple sets of registers for storing addressing and control parameters utilized to generate one or more asynchronous memory move (AMM) operations. The memory mover detects a receipt of a first set of parameters in a first set of registers from the processor. The processor forwards the parameters after the processor initiates a data move in virtual address space, utilizing a source effective address and a destination effective address. The memory mover responds to receiving the first set of parameters by generating and launching a first asynchronous memory move (AMM) operation. When the memory mover receives a second set of parameters in a second set of registers before the first AMM operation completes, the memory mover generates and launches a second AMM operation concurrently with the first AMM operation if no address conflicts exist.
摘要翻译： 数据处理系统具有异步存储器移动器，其包括用于存储用于生成一个或多个异步存储器移动（AMM）操作的寻址和控制参数的多组寄存器。 存储器移动器检测来自处理器的第一组寄存器中的第一组参数的接收。 处理器在虚拟地址空间中启动数据移动后，使用源有效地址和目标有效地址，处理器转发参数。 存储器移动器响应于通过生成和启动第一异步存储器移动（AMM）操作来接收第一组参数。 当存储器移动器在第一个AMM操作完成之前在第二组寄存器中接收到第二组参数时，如果不存在地址冲突，则存储器移动器生成并与第一个AMM操作同时启动第二个AMM操作。
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19.发明授权Issuing global shared memory operations via direct cache injection to a host fabric interface 有权通过直接缓存注入向主机结构接口发出全局共享内存操作公开(公告)号：US07966454B2
公开(公告)日：2011-06-21
申请号：US12024437
申请日：2008-02-01
申请人： Lakshimarayana B. Arimilli , Ravi K. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , William J. Starke , Hanhong Xue
发明人： Lakshimarayana B. Arimilli , Ravi K. Arimilli , Robert S. Blackmore , Chulho Kim , Ramakrishnan Rajamony , William J. Starke , Hanhong Xue
IPC分类号： G06F9/318
CPC分类号： G06F12/0815 , G06F12/0897 , G06F12/10
摘要： A data processing system enables global shared memory (GSM) operations across multiple nodes with a distributed EA-to-RA mapping of physical memory. Each node has a host fabric interface (HFI), which includes HFI windows that are assigned to at most one locally-executing task of a parallel job. The tasks perform parallel job execution, but map only a portion of the effective addresses (EAs) of the global address space to the local, real memory of the task's respective node. The HFI window tags all outgoing GSM operations (of the local task) with the job ID, and embeds the target node and HFI window IDs of the node at which the EA is memory mapped. The HFI window also enables processing of received GSM operations with valid EAs that are homed to the local real memory of the receiving node, while preventing processing of other received operations without a valid EA-to-RA local mapping.
摘要翻译： 数据处理系统通过物理内存的分布式EA-to-RA映射实现跨多个节点的全局共享存储（GSM）操作。 每个节点都有一个主机结构接口（HFI），它包括分配给并行作业最多一个本地执行任务的HFI窗口。 任务执行并行作业执行，但将全局地址空间的有效地址（EA）的一部分映射到任务相应节点的本地实际存储器。 HFI窗口使用作业ID对所有传出的GSM操作（本地任务）进行标记，并嵌入EA被映射到的节点的目标节点和HFI窗口ID。 HFI窗口还能够利用归属于接收节点的本地实际存储器的有效EA来处理接收的GSM操作，同时防止在没有有效的EA到RA本地映射的情况下处理其他接收到的操作。
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公开(公告)号：US20110078410A1
公开(公告)日：2011-03-31
申请号：US11457921
申请日：2006-07-17
申请人： Robert S. Blackmore , Rama K. Govindaraju , Peter H. Hochschild , Chulho Kim , Rajeev Sivaram , Richard R. Treumann , Hanhong Xue
发明人： Robert S. Blackmore , Rama K. Govindaraju , Peter H. Hochschild , Chulho Kim , Rajeev Sivaram , Richard R. Treumann , Hanhong Xue
CPC分类号： G06F15/17375
摘要： Disclosed are a method of and system for multiple party communications in a processing system including multiple processing subsystems. Each of the processing subsystems includes a central processing unit and one or more network adapters for connecting said each processing subsystem to the other processing subsystems. A multitude of nodes are established or created, and each of these nodes is associated with one of the processing subsystems. A first aspect of the invention involves pipelined communication using RDMA among three nodes, where the first node breaks up a large communication into multiple parts and sends these parts one after the other to the second node using RDMA, and the second node in turn absorbs and forwards each of these parts to a third node before all parts of the communication arrive from the first node.
摘要翻译： 公开了一种包括多个处理子系统的处理系统中的多方通信的方法和系统。 每个处理子系统包括中央处理单元和用于将所述每个处理子系统连接到其他处理子系统的一个或多个网络适配器。 建立或创建多个节点，并且这些节点中的每一个都与处理子系统之一相关联。 本发明的第一方面涉及在三个节点之间使用RDMA的流水线通信，其中第一节点将大型通信分解成多个部分，并且使用RDMA将这些部分一个接一个地发送到第二节点，并且第二节点依次吸收和 在通信的所有部分从第一节点到达之前，将这些部分中的每一个转发到第三节点。
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