公开(公告)号：US11805641B2

公开(公告)日：2023-10-31

申请号：US17568499

申请日：2022-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sa Hwan Hong ,  Jong Myeong Kim ,  Myeong Jin Bang ,  Kong Soo Lee ,  Han Mei Choi ,  Ho Kyun An

IPC: H10B41/20 ,  H10B41/60

CPC classification number: H10B41/20 ,  H10B41/60

Abstract: A method for manufacturing a semiconductor device is provided. The method for manufacturing a semiconductor device comprises providing a first substrate including a buffer layer and a base substrate, forming a stacked mold structure including a plurality of unit laminates on the buffer layer, each of the unit laminates including a first sacrificial layer, a first silicon layer, a second sacrificial layer, and a second silicon layer sequentially stacked in a vertical direction and replacing the stacked mold structure with a stacked memory structure through a replacement process, wherein the stacked memory structure includes a metal pattern which replaces the first sacrificial layer and the second sacrificial layer, and an insulating pattern which replaces the second silicon layer, the buffer layer includes silicon-germanium, and a germanium concentration of the buffer layer varies depending on the germanium concentration of the first sacrificial layer and the germanium concentration of the second sacrificial layer.

公开(公告)号：US11575019B2

公开(公告)日：2023-02-07

申请号：US16553249

申请日：2019-08-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho Kyun An ,  Dong Hyun Im

IPC: H01L29/66 ,  H01L27/24 ,  H01L29/36 ,  H01G9/20 ,  H01L29/06 ,  H01L29/861 ,  H01L45/00 ,  H01L27/22

Abstract: Forming a semiconductor device includes forming a first conductive line on a substrate, forming a memory cell including a switching device and a data storage element on the first conductive line, and forming a second conductive line on the memory cell. Forming the switching device includes forming a first semiconductor layer, forming a first doped region by injecting a n-type impurity into the first semiconductor layer, forming a second semiconductor layer thicker than the first semiconductor layer, on the first semiconductor layer having the first doped region, forming a second doped region by injecting a p-type impurity into an upper region of the second semiconductor layer, and forming a P-N diode by performing a heat treatment process to diffuse the n-type impurity and the p-type impurity in the first doped region and the second doped region to form a P-N junction of the P-N diode in the second semiconductor layer.

公开(公告)号：US11430794B2

公开(公告)日：2022-08-30

申请号：US17242932

申请日：2021-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho Kyun An ,  Bumsoo Kim

IPC: H01L27/108 ,  H01L21/32 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3215

Abstract: A method for fabricating a semiconductor device includes providing a substrate including a cell region and a core/peripheral region around the cell region, forming a gate insulating film on the substrate of the core/peripheral region, forming a first conductive film of a first conductive type on the gate insulating film, forming a diffusion blocking film within the first conductive film, the diffusion blocking film being spaced apart from the gate insulating film in a vertical direction, after forming the diffusion blocking film, forming an impurity pattern including impurities within the first conductive film, diffusing the impurities through a heat treatment process to form a second conductive film of a second conductive type and forming a metal gate electrode on the second conductive film, wherein the diffusion blocking film includes helium (He) and/or argon (Ar).