公开(公告)号：US11776857B2

公开(公告)日：2023-10-03

申请号：US17567403

申请日：2022-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunki Min ,  Donghyun Roh

IPC: H01L21/8238 ,  H01L21/8234 ,  H01L21/762 ,  H01L21/764 ,  H01L27/092 ,  H01L27/088 ,  H01L29/417

CPC classification number: H01L21/823821 ,  H01L21/764 ,  H01L21/76229 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L21/823864 ,  H01L27/0886 ,  H01L27/0924 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/41791

Abstract: A method for manufacturing a semiconductor device includes forming a first active fin and a second active fin on a first active region and a second active region of a substrate, respectively, forming a device isolation layer to cover sidewalls of lower portions of the first active fin and the second active fin, forming a first liner layer and a second liner layer to cover upper portions of the first active fin and the second active fin, respectively, forming a first gate electrode and a second gate electrode on the first active fin and the second active fin, respectively, and forming a first source/drain region and a second source/drain region on the first active fin and the second active fin, respectively. The first liner layer includes a different material from a material of the second liner layer.

公开(公告)号：US11189707B2

公开(公告)日：2021-11-30

申请号：US16837329

申请日：2020-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangkoo Kang ,  Sungsoo Kim ,  Sunki Min ,  Iksoo Kim ,  Donghyun Roh

IPC: H01L29/49 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L29/66 ,  H01L21/764

Abstract: A semiconductor device includes a substrate including an active region extending in a first direction; a gate structure intersecting the active region and extending in a second direction on the substrate, the gate structure including a gate electrode, a gate capping layer on the gate electrode, and a plurality of spacers on side surfaces of the gate electrode; source/drain regions on the active region on at least one side of the gate structure; a first insulating layer and a second insulating layer on the source/drain regions on at least one side of the gate structure; and contact plugs on the source/drain regions and penetrating the first and second insulating layers. The plurality of spacers include a first spacer on the side surfaces of the gate electrode, an air-gap spacer on an external side surface of the first spacer, and a second spacer on an external side surface of the air-gap spacer An upper portion of the second spacer is bent towards an upper portion of the first spacer and is configured to cap the air-gap spacer.

公开(公告)号：US10580702B2

公开(公告)日：2020-03-03

申请号：US15907573

申请日：2018-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunki Min ,  Donghyun Roh

IPC: H01L21/8238 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8234

Abstract: A semiconductor device includes first active patterns and second active patterns on a substrate, a first source/drain region on the first active patterns, a second source/drain region on the second active patterns and a device isolation layer filling a first trench between adjacent ones of the first active patterns and a second trench between adjacent ones of the second active patterns. A liner layer is disposed on the device isolation layer between the adjacent ones of the second active patterns. The device isolation layer between the adjacent ones of the first active patterns has a recess therein under the first source/drain region and a bottom surface of the liner layer between the adjacent ones of the second active patterns is higher than the recess.

公开(公告)号：US10332780B2

公开(公告)日：2019-06-25

申请号：US15828728

申请日：2017-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunki Min ,  Songe Kim ,  Koungmin Ryu ,  Je-Min Yoo

IPC: H01L29/78 ,  H01L21/762 ,  H01L27/092 ,  H01L29/423 ,  H01L29/786 ,  H01L21/8238 ,  H01L29/06

Abstract: A semiconductor device includes a substrate having a first active pattern and a second active pattern, the first active pattern including a first recess region dividing an upper portion thereof into a first portion and a second portion, the second active pattern including a second recess region dividing an upper portion thereof into a first portion and a second portion, a first insulating pattern covering an inner sidewall of the first recess region, and a second insulating pattern covering an inner sidewall of the second recess region. The first insulating pattern and the second insulating pattern include the same insulating material, and a volume fraction of the first insulating pattern with respect to a volume of the first recess region is smaller than a volume fraction of the second insulating pattern with respect to a volume of the second recess region.