System and method of operating automatic gain control in the presence of high peak-to-average ratio blockers

    公开(公告)号:US10742185B1

    公开(公告)日:2020-08-11

    申请号:US16367908

    申请日:2019-03-28

    Abstract: A wireless receiver including a gain network that adjusts a gain of a received wireless signal and provides an RF signal, a level detector that provides a level indication while a strength of the RF signal is at least an RF level threshold, a timing system that provides a timing value indicative of a total amount of time that the level indication is provided during a timing window, a gain up disable circuit that provides a gain up disable signal when the timing value reaches a low threshold, a blocker strength detect circuit that provides a gain down request signal when the timing value reaches a high threshold, and an AGC circuit that does not increase the gain of the gain network while the gain up disable signal is provided, and that allows a reduction of the gain of the gain network while the gain down request signal is provided.

    Wireless receiver with automatic gain control optimization for sensitivity and distortion

    公开(公告)号:US10587295B1

    公开(公告)日:2020-03-10

    申请号:US16217494

    申请日:2018-12-12

    Abstract: A wireless receiver including multiple amplifiers coupled in series for amplifying a signal being received, at least one detector that provides a strength indication of the signal being received, multiple AGC schedules each determining a gain reduction schedule for the amplifiers, an AGC schedule selector that selects one of the AGC schedules based on a schedule select input, and an AGC controller that adjusts a gain of at least one of the amplifiers according to a selected AGC schedule based on the strength indication of the signal being received. The AGC schedules may include a first AGC schedule configured for improved SNR performance and a second AGC schedule configured for improved distortion performance. The second AGC schedule may be selected for improved distortion performance when a strong distorting blocker signal is present, and otherwise the first AGC schedule may be selected for better SNR performance.

    Resonant MEMS lorentz-force magnetometer using force-feedback and frequency-locked coil excitation
    13.
    发明授权
    Resonant MEMS lorentz-force magnetometer using force-feedback and frequency-locked coil excitation 有权
    使用力反馈和频率锁定线圈激励的共振MEMS洛伦兹力磁力计

    公开(公告)号:US09588190B2

    公开(公告)日:2017-03-07

    申请号:US13729516

    申请日:2012-12-28

    CPC classification number: G01R33/0286 B81B3/0032

    Abstract: A method includes supplying a current to at least one conductive path integral with a MEMS device to thereby exert a Lorentz force on the MEMS device in the presence of a magnetic field. The method includes determining the magnetic field based on a control value in a control loop configured to maintain a constrained range of motion of the MEMS device. The control loop may be configured to maintain the MEMS device in a stationary position. The current may have a frequency equal to a resonant frequency of the MEMS device.

    Abstract translation: 一种方法包括将电流提供给与MEMS器件集成的至少一个导电路径,从而在存在磁场的情况下在MEMS器件上施加洛伦兹力。 该方法包括基于被配置为保持MEMS器件的受限的运动范围的控制回路中的控制值来确定磁场。 控制回路可以被配置为将MEMS器件保持在静止位置。 电流可以具有等于MEMS器件的谐振频率的频率。

    CONFIGURABLE CORRELATOR BANK FOR A NON-COHERENT DSSS DEMODULATOR

    公开(公告)号:US20250007770A1

    公开(公告)日:2025-01-02

    申请号:US18217019

    申请日:2023-06-30

    Abstract: A demodulator has a correlator bank with multiple correlators. The correlator bank has multiple configurations, including a signal arrival configuration, a coarse timing configuration, and a despreading configuration. The various configurations are used to correlate function transformations of received symbols to template signals. Each correlator has elements with a number of delay blocks corresponding to a number of chips in a symbol. The output of each delay block is multiplied by a bit of a template signal by negating or not negating the output and the multiplications results are summed. A function transformations block receives phase information to generate the function transformations, which are supplied to the correlators. The function transformations include a transformation with a one chip differential, transformations with multi-chip differentials, an average transformation that includes an average of a one-chip phase difference between two adjacent samples, and a second order phase differentiation used for frequency deviation correlation.

    PHASE MEASUREMENTS FOR HIGH ACCURACY DISTANCE MEASUREMENTS

    公开(公告)号:US20230337160A1

    公开(公告)日:2023-10-19

    申请号:US18215488

    申请日:2023-06-28

    CPC classification number: H04W56/0035 H04W56/005 H04W4/023

    Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.

    Context switching demodulator and symbol identifier

    公开(公告)号:US11777548B1

    公开(公告)日:2023-10-03

    申请号:US17743047

    申请日:2022-05-12

    CPC classification number: H04B1/16 H04L7/042

    Abstract: A receiver concurrently demodulates data transmitted with a plurality of protocols. The receiver utilizes multiple and simultaneous protocol detections at preamble and/or packet payload phases. To provide robust detection and achieve fewer false detections, the receiver extends the cross correlation length once a short cross-correlation is valid. The receiver includes a first demodulator path and a second demodulator path with different filter bandwidths. The second demodulator path includes a decimator that reduces data by two. A correlator bank is coupled to the first and second demodulator paths and concurrently detects preamble symbols associated with a plurality of protocols. A first noise detector is coupled to the first demodulator path and a second noise detector is coupled to the second demodulator path. A first symbol identifier circuit is coupled to the first demodulator path and a second symbol identifier circuit coupled to the second demodulator path to provide packet payload symbol detection.

    Adjusting DFT coefficients to compensate for frequency offset during a sounding sequence used for fractional time determination

    公开(公告)号:US11638116B2

    公开(公告)日:2023-04-25

    申请号:US17108908

    申请日:2020-12-01

    Abstract: A receiver includes a first discrete Fourier transform (DFT) block to perform a first single tone DFT on a positive tone associated with a sounding sequence. A second DFT block performs a second single tone DFT on a negative tone associated with the sounding sequence. A DFT coefficient generation block generates first DFT coefficients based on a nominal frequency of the positive tone and an estimated frequency offset between a transmitter frequency and a receiver frequency. The DFT coefficient generation block generates second DFT coefficients based on a nominal frequency of the negative tone and the estimated frequency offset. Multipliers in the DFT blocks multiply I and Q values of the sounding sequence with the coefficients. Accumulators in the DFT blocks accumulate multiplier outputs. An arctan function receives averaged accumulated values from the first and second DFT blocks and supplies first and second phase values used to calculate fractional timing.

    Fast signal identification of Bluetooth, ZigBee and other network protocols

    公开(公告)号:US11611907B2

    公开(公告)日:2023-03-21

    申请号:US17840107

    申请日:2022-06-14

    Abstract: A system and method for detecting the presence of a Bluetooth or Zigbee signal within a short period of time is disclosed. The signal identification circuit has two stages, a first stage that processes windows to determine whether noise is present, and a second stage that processes long windows to determine whether the signal is a particular lower-power network protocol. The signal identification circuit can be configured to detect Bluetooth at 1 Mbps, Bluetooth at 2 Mbps or Zigbee. The signal identification signal may be used to allow a lower-power network controller to coexist with a high duty cycle WiFi controller. The signal identification circuit may also be used for other functions, such as powering on a lower-power network controller, determining CCA, or determining which channel a packet is being transmitted on.

    Frequency offset compensation at reflector during frequency compensation interval

    公开(公告)号:US11438200B2

    公开(公告)日:2022-09-06

    申请号:US17107305

    申请日:2020-11-30

    Abstract: A method for communicating between a first radio frequency communications device including a first local oscillator and a second radio frequency communications device including a second local oscillator includes receiving a packet using a receiver of the first radio frequency communications device. The method includes detecting an average frequency offset based on sequential samples of the packet. The method includes applying a first adjustment to the first local oscillator to reduce a frequency offset between the first local oscillator and the second local oscillator. The first adjustment is based on the average frequency offset. The method includes, after adjusting the first local oscillator, transmitting a second packet to the second radio frequency communications device by the first radio frequency communications device using the first adjustment and the first local oscillator.

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