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公开(公告)号:US10560020B2
公开(公告)日:2020-02-11
申请号:US16103582
申请日:2018-08-14
Applicant: STMicroelectronics (Alps) SAS
Inventor: Alexandre Pons
Abstract: A method can be used for compensating a voltage drop on a cable connected between a source device and a receiver device. The source device delivers an offset current on a channel configuration pin of the source device, the offset current causing an increase in a voltage on the channel configuration pin of the source device to a chosen reference voltage. The offset current is stored in the source device. The source device absorbs an absorption current originating from the channel configuration pin of the source device, the absorption current depending on the stored offset current and on the voltage drop. The source device generates a compensated supply voltage on a power supply pin of the source device, the compensated supply voltage equal to a reference supply voltage increased by the voltage drop to within a tolerance.
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公开(公告)号:US11703901B2
公开(公告)日:2023-07-18
申请号:US17737692
申请日:2022-05-05
Inventor: Jean Camiolo , Alexandre Pons
IPC: G05F1/575 , G01R19/165 , G05F3/18 , G06F1/26 , H03F3/45 , H03K3/0233 , G05F1/56
CPC classification number: G05F1/575 , G01R19/16528 , G05F1/56 , G05F3/185 , G06F1/266 , H03F3/45076 , H03K3/02337
Abstract: A first terminal receives a first DC voltage. A switch selectively couples the first terminal to a second terminal providing an output. A control circuit selectively actuates the switch in response to a comparison of the first DC voltage to a second DC voltage. A low-dropout (LDO) linear voltage regulator, connected between the first and third terminals, operates to provide the second DC voltage from the first DC voltage.
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公开(公告)号:US10423179B2
公开(公告)日:2019-09-24
申请号:US16381541
申请日:2019-04-11
Applicant: STMicroelectronics (Alps) SAS
Inventor: Alexandre Pons
IPC: H02J7/00 , G05F1/59 , H03F3/45 , H02J7/02 , G05F1/56 , H01R24/60 , H02J7/06 , G05F1/569 , H01R107/00 , H02J7/10
Abstract: A low dropout voltage regulator unit includes an error amplifier and a power stage having an output terminal that is looped back onto the error amplifier and is capable of delivering an output current to a load. The unit includes multiple main supply inputs that are intended to potentially receive, respectively, multiple different supply voltages. The power stage includes multiple power paths that are connected, respectively, between the main supply inputs and the output terminal, are individually selectable and each comprise an output transistor. The unit also includes a selector circuit connected to the main supply inputs and configured to select one of the power paths according to a selection criterion. The error amplifier includes an output stage configured to selectively control the output transistor of the selected power path.
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公开(公告)号:US20170336819A1
公开(公告)日:2017-11-23
申请号:US15364392
申请日:2016-11-30
Applicant: STMicroelectronics (Alps) SAS
Inventor: Alexandre Pons
CPC classification number: G05F1/59 , G05F1/56 , G05F1/569 , H01R24/60 , H01R2107/00 , H02J7/022 , H02J7/06 , H02J2007/10 , H03F3/45071 , H03F2203/45521 , H03F2203/45641
Abstract: A low dropout voltage regulator unit includes an error amplifier and a power stage having an output terminal that is looped back onto the error amplifier and is capable of delivering an output current to a load. The unit includes multiple main supply inputs that are intended to potentially receive, respectively, multiple different supply voltages. The power stage includes multiple power paths that are connected, respectively, between the main supply inputs and the output terminal, are individually selectable and each comprise an output transistor. The unit also includes a selector circuit connected to the main supply inputs and configured to select one of the power paths according to a selection criterion. The error amplifier includes an output stage configured to selectively control the output transistor of the selected power path.
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公开(公告)号:US20160224042A1
公开(公告)日:2016-08-04
申请号:US14868095
申请日:2015-09-28
Applicant: STMicroelectronics (Alps) SAS
Inventor: Alexandre Pons
IPC: G05F1/575
CPC classification number: G05F1/575 , H02J1/02 , H02J7/0068 , H02J7/34 , H03K19/0016
Abstract: The present disclosure relates to a voltage regulation circuit including a first transistor connected between an input of voltage to be regulated and an output of a regulated voltage. A first regulation loop controls the first transistor according to a difference between a reference voltage and a first feedback voltage derived from the regulated voltage. A second transistor is connected in series between the first transistor and the output. A second regulation loop controls the second transistor according to a difference between the reference voltage and a second feedback voltage derived from the regulated voltage. The second regulation loop is active in low and high power regulation modes. A switch circuit forces the first transistor into an on state in a low power regulation mode.
Abstract translation: 本公开涉及一种电压调节电路,其包括连接在待调节电压的输入和调节电压的输出之间的第一晶体管。 第一调节环路根据参考电压和从调节电压导出的第一反馈电压之间的差来控制第一晶体管。 第二晶体管串联连接在第一晶体管和输出端之间。 第二调节环路根据参考电压和从调节电压导出的第二反馈电压之间的差来控制第二晶体管。 第二个调节回路在低功率和高功率调节模式下有效。 开关电路迫使第一晶体管处于低功率调节模式的导通状态。
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