公开(公告)号：US20150207581A1

公开(公告)日：2015-07-23

申请号：US14604439

申请日：2015-01-23

Applicant: STMicroelectronics S.r.l.

Inventor： Daniele Mangano ,  Salvatore Pisasale

IPC: H04J3/06 ,  H04L7/04 ,  H04L12/26

CPC classification number: H04L43/0858 ,  G06F1/04 ,  G06F13/4291 ,  H04L7/0008 ,  H04L7/0037 ,  H04L7/005 ,  H04L7/10

Abstract: A communication system for interfacing a transmitting circuit with a receiving circuit includes a transmission interface for receiving data from the transmitting circuit and transmitting the data received over at least one data line in response to a transmission clock signal. The communication system also includes a reception interface configured for receiving the data in response to a reception clock signal and transmitting the data received to the receiving circuit. In particular, the system is configured for generating a plurality of clock signals that have the same frequency but are phase-shifted with respect to one another. In addition, during a calibration phase, the system is configured for selecting one of the clock signals for the transmission clock signal or reception clock signal via selecting at least one of the clock signals for transmission of test signals via the transmission interface and verifying whether the test signals received via the reception interface are correct. The system is further configured to use, during normal operation, the clock signal selected during the calibration phase for transmission of data.

Abstract translation: 用于将发射电路与接收电路接口的通信系统包括用于从发射电路接收数据的传输接口，并响应于传输时钟信号发射通过至少一条数据线接收的数据。 通信系统还包括：接收接口，被配置为响应于接收时钟信号接收数据，并将接收到的数据发送到接收电路。 特别地，该系统被配置为产生具有相同频率但是相对于彼此相移的多个时钟信号。 此外，在校准阶段期间，系统被配置为通过经由传输接口选择用于传输测试信号的时钟信号中的至少一个来选择传输时钟信号或接收时钟信号中的一个时钟信号，并且验证 通过接收接口接收到的测试信号是正确的。 该系统还被配置为在正常操作期间使用在校准阶段期间选​​择的用于传输数据的时钟信号。