公开(公告)号：US11855588B2

公开(公告)日：2023-12-26

申请号：US17581334

申请日：2022-01-21

申请人： STMicroelectronics S.r.l.

发明人： Edoardo Marino ,  Alessio Vallese ,  Alessio Facen ,  Enrico Mammei ,  Paolo Pulici

IPC分类号： H03F3/45 ,  H03F1/32

CPC分类号： H03F1/3211 ,  H03F3/45179 ,  H03F3/45479 ,  H03F3/4508 ,  H03F3/45085

摘要： In an embodiment, an electronic circuit includes: an input differential pair including first and second transistors; a first pair of transistors in emitter-follower configuration including third and fourth transistors, and an output differential pair including fifth and sixth transistors. The third transistor has a control terminal coupled to the first transistor, and a current path coupled to a first output terminal. The fourth transistor has a control terminal coupled to the second transistor, and a current path coupled to a second output terminal. The fifth transistor has a control terminal coupled to the first transistor, and a first current path terminal coupled to the first output terminal. The sixth transistor has a control terminal coupled to the second transistor, and a first current path terminal coupled to the second output terminal. First and second termination resistors are coupled between the first pair of transistors and the output differential pair.

公开(公告)号：US20230238921A1

公开(公告)日：2023-07-27

申请号：US17581334

申请日：2022-01-21

申请人： STMicroelectronics S.r.l

发明人： Edoardo Marino ,  Alessio Vallese ,  Alessio Facen ,  Enrico Mammei ,  Paolo Pulici

IPC分类号： H03F1/32 ,  H03F3/45

CPC分类号： H03F1/3211 ,  H03F3/45179 ,  H03F3/45479 ,  H03F3/4508

摘要： In an embodiment, an electronic circuit includes: an input differential pair including first and second transistors; a first pair of transistors in emitter-follower configuration including third and fourth transistors, and an output differential pair including fifth and sixth transistors. The third transistor has a control terminal coupled to the first transistor, and a current path coupled to a first output terminal. The fourth transistor has a control terminal coupled to the second transistor, and a current path coupled to a second output terminal. The fifth transistor has a control terminal coupled to the first transistor, and a first current path terminal coupled to the first output terminal. The sixth transistor has a control terminal coupled to the second transistor, and a first current path terminal coupled to the second output terminal. First and second termination resistors are coupled between the first pair of transistors and the output differential pair.