公开(公告)号：US20240324349A1

公开(公告)日：2024-09-26

申请号：US18533518

申请日：2023-12-08

Applicant: Samsung Display Co., LTD.

Inventor： Myounggeun CHA ,  Sanggun CHOI ,  Keunwoo KIM

IPC: H10K59/131

CPC classification number: H10K59/131 ,  H10K59/1216

Abstract: A display apparatus includes a first transistor including a first semiconductor layer including a silicon semiconductor and a first gate electrode below the first semiconductor layer, where the first transistor controls a magnitude of a driving current flowing to a display element, a data line which transmits a data voltage, a second transistor including a second semiconductor layer including an oxide semiconductor, where the second transistor connects the data line to the first transistor in response to a scan signal, and a first capacitor including a first electrode and a second electrode, where the first electrode is disposed on the first semiconductor layer, and the second electrode at least partially overlaps the first electrode.

公开(公告)号：US20190341440A1

公开(公告)日：2019-11-07

申请号：US16382634

申请日：2019-04-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Myounggeun CHA ,  Sanggun CHOI ,  Jiyeong SHIN ,  Yong Su LEE

IPC: H01L27/32 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  H01L33/06 ,  H01L33/50 ,  H01L27/15

Abstract: A display device including: a substrate; a light emitting element on the substrate; a pixel circuit between the substrate and the light emitting element, wherein the pixel circuit is electrically connected to the light emitting element, and includes a plurality of transistors; and a conductive pattern including an electrode portion and a wiring portion for supplying a voltage to the electrode portion, wherein the electrode portion overlaps an active pattern of at least one transistor among the plurality of transistors, wherein the conductive pattern is disposed between the substrate and the active pattern, and wherein a thickness of the wiring portion is greater than a thickness of the electrode portion.

公开(公告)号：US20190340978A1

公开(公告)日：2019-11-07

申请号：US16381491

申请日：2019-04-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Myounggeun CHA ,  Sanggun CHOI ,  Jiyeong SHIN ,  Yong Su LEE

IPC: G09G3/3233

Abstract: A pixel unit of a display device including: an OLED; a first transistor including a first electrode connected to a first node, a second electrode connected to a second node, and a third electrode connected to a third node; a capacitor including a first electrode receiving a power voltage and a second electrode connected to the first node; a second transistor including a first electrode receiving a scan signal, a second electrode receiving a data voltage and a third electrode connected to the second node; a third transistor including a first electrode receiving the scan signal, a second electrode connected to the first node and a third electrode connected to the third node, wherein at least one of the first and third transistors includes a fourth electrode, the fourth electrode receives a compensation voltage when an operation temperature is above a preset temperature and is floated when the operation temperature is equal to or more than the preset temperature.

公开(公告)号：US20190245016A1

公开(公告)日：2019-08-08

申请号：US16256797

申请日：2019-01-24

Applicant: Samsung Display Co., Ltd.

Inventor： Yongsu LEE ,  Sunghwan CHOI ,  Sunghoon YANG ,  Thanh Tien NGUYEN ,  Myounggeun CHA

IPC: H01L27/32 ,  H01L27/12

CPC classification number: H01L27/3246 ,  H01L27/1222 ,  H01L27/3258 ,  H01L27/3276

Abstract: A display apparatus includes a base substrate, a conductive layer disposed on the base substrate to cover entire of the base substrate, wherein the conductive layer is configured to be applied with a ground voltage, a buffer layer disposed on the conductive layer, an active pattern comprising a drain region, a source region and a channel region between the drain region and the source region, a first insulation layer disposed on the active pattern, a gate pattern disposed on the first insulation layer and comprising a gate electrode which overlapping the channel region of the active pattern, a second insulation layer disposed on the gate pattern, and a data pattern comprising a source electrode electrically connected to the source region of the active pattern, and a drain electrode electrically connected to the drain region of the active pattern.