DISPLAY DEVICE
    13.
    发明申请

    公开(公告)号:US20240372045A1

    公开(公告)日:2024-11-07

    申请号:US18421690

    申请日:2024-01-24

    Abstract: A display device includes a substrate including a display area surrounded by a non-display area, a bank structure disposed on the substrate in the display area and including a plurality of openings, a plurality of light emitting elements disposed in the openings, a first dam disposed on the substrate in the non-display area and spaced apart from the bank structure, and a second dam spaced apart from the first dam in the non-display area, wherein the bank structure includes a first bank layer and a second bank layer disposed on the first bank layer, wherein the first dam includes a first sub-dam structure and a second sub-dam structure disposed on the first sub-dam structure, and the second bank layer includes tips protruding from sidewalls of the first bank layer, and the second sub-dam structure includes tips protruding from sidewalls of the first sub-dam structure.

    DISPLAY DEVICE
    14.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240107840A1

    公开(公告)日:2024-03-28

    申请号:US18526207

    申请日:2023-12-01

    Abstract: A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.

    DISPLAY DEVICE
    15.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20230419886A1

    公开(公告)日:2023-12-28

    申请号:US18458526

    申请日:2023-08-30

    Abstract: A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.

    DISPLAY DEVICE
    17.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20230154416A1

    公开(公告)日:2023-05-18

    申请号:US18093515

    申请日:2023-01-05

    CPC classification number: G09G3/3291 G09G2300/0426 H10K59/1213

    Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.

    DISPLAY DEVICE
    18.
    发明申请

    公开(公告)号:US20210280127A1

    公开(公告)日:2021-09-09

    申请号:US17187996

    申请日:2021-03-01

    Abstract: A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.

    DISPLAY PANEL
    19.
    发明申请
    DISPLAY PANEL 审中-公开

    公开(公告)号:US20190267433A1

    公开(公告)日:2019-08-29

    申请号:US16125562

    申请日:2018-09-07

    Abstract: A display panel includes: an active area and a peripheral area adjacent to the active area, wherein the active area includes a display area including a plurality of emitting pixels and a non-display area including a plurality of non-emitting pixels, an emitting pixel of the plurality of emitting pixels includes a light-emitting element, and a non-emitting pixel of the non-emitting pixels does not include any light-emitting element or includes a pseudo-light-emitting element that is not capable of emitting light.

    DISPLAY DEVICE
    20.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240119907A1

    公开(公告)日:2024-04-11

    申请号:US18541885

    申请日:2023-12-15

    CPC classification number: G09G3/3291 G09G2300/0426 H10K59/1213

    Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.

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