公开(公告)号：US10439067B2

公开(公告)日：2019-10-08

申请号：US14858281

申请日：2015-09-18

Applicant: Samsung Display Co., Ltd.

Inventor： Ki-Won Kim ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Hyun-Jung Lee

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L21/02 ,  H01L27/32 ,  H01L29/66

Abstract: A display substrate is provided. The display substrate includes a gate interconnection disposed on an insulating substrate, an oxide semiconductor pattern disposed on the gate interconnection and including an oxide semiconductor, and a data interconnection disposed on the oxide semiconductor pattern to interconnect the gate interconnection. The oxide semiconductor pattern includes a first oxide semiconductor pattern having a first oxide and a first element and a second oxide semiconductor pattern having a second oxide.

公开(公告)号：US09825065B2

公开(公告)日：2017-11-21

申请号：US15342756

申请日：2016-11-03

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

Abstract: A substrate including gate wirings including gate line and a gate electrode disposed on the substrate, a storage line disposed on the same layer as the gate wirings, a gate insulating layer disposed on the gate wirings and the storage line, an oxide semiconductor layer pattern disposed on the gate insulating layer, data wirings including a data line crossing the gate line, a source electrode disposed on one side of the oxide semiconductor layer pattern, and a drain electrode disposed on another side of the oxide semiconductor layer, and an etch stopper including a first etch stopper portion disposed between the storage line and the data line and partially overlapping both the data line and the storage line.

公开(公告)号：US09117917B2

公开(公告)日：2015-08-25

申请号：US13650528

申请日：2012-10-12

Applicant: Samsung Display Co., Ltd.

Inventor： Hyun-Jung Lee ,  Sung-Haeng Cho ,  Woo-Geun Lee ,  Jang-Hoon Ha ,  Hee-Jun Byeon ,  Ji-Yun Hong ,  Ji-Soo Oh

IPC: H01L27/15 ,  H01L29/786

CPC classification number: H01L29/78693 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/78606 ,  H01L29/7869

Abstract: A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.

Abstract translation: 薄膜晶体管（TFT）包括衬底，在衬底上设置有在半导体层上彼此间隔开的第一源电极和第一漏电极的半导体层，设置在第一源极之间的半导体层中的沟道区 所述第一漏电极，设置在所述沟道区上的防蚀层，所述第一源电极和所述第一漏电极以及与所述第一源极接触的第二源电极，以及与所述第一漏极接触的第二漏极 电极。

公开(公告)号：US09105733B2

公开(公告)日：2015-08-11

申请号：US13897879

申请日：2013-05-20

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

Abstract translation: 提供薄膜晶体管（TFT）阵列基板及其制造方法。 TFT阵列基板可以包括设置在基板上的栅极线，包括栅极线和栅电极，设置在栅电极上的氧化物半导体层图案，设置在氧化物半导体层图案上的数据线，并且包括源电极和 薄膜晶体管（TFT）的漏电极和栅极电极以及沿着与栅极线相交的方向延伸的数据线，以及设置在源极/漏极之间形成TFT的区域的蚀刻停止图案，以及 氧化物半导体层图案和栅极线与数据线在栅极线与数据线之间重叠的区域。