Thin film transistor array substrate and manufacturing method thereof

    公开(公告)号:US11437412B2

    公开(公告)日:2022-09-06

    申请号:US17124497

    申请日:2020-12-17

    摘要: A substrate including a gate line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer, the third electrode spaced apart from the second electrode, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

    THIN FILM TRANSISTOR, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE SAME
    6.
    发明申请
    THIN FILM TRANSISTOR, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    薄膜晶体管,薄膜晶体管板及其制造方法

    公开(公告)号:US20150287836A1

    公开(公告)日:2015-10-08

    申请号:US14743387

    申请日:2015-06-18

    摘要: A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.

    摘要翻译: 薄膜晶体管(TFT)包括衬底,在衬底上设置有在半导体层上彼此间隔开的第一源电极和第一漏电极的半导体层,设置在第一源极之间的半导体层中的沟道区 所述第一漏电极,设置在所述沟道区上的防蚀层,所述第一源电极和所述第一漏电极以及与所述第一源极接触的第二源电极,以及与所述第一漏极接触的第二漏极 电极。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号:US20130248866A1

    公开(公告)日:2013-09-26

    申请号:US13897879

    申请日:2013-05-20

    IPC分类号: H01L29/786

    摘要: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

    摘要翻译: 提供薄膜晶体管(TFT)阵列基板及其制造方法。 TFT阵列基板可以包括设置在基板上的栅极线,包括栅极线和栅电极,设置在栅电极上的氧化物半导体层图案,设置在氧化物半导体层图案上的数据线,并且包括源电极和 薄膜晶体管(TFT)的漏电极和栅电极以及沿着与栅极线交叉的方向延伸的数据线,以及蚀刻停止图案,设置在源极/漏极之间形成TFT的区域,以及 氧化物半导体层图案和栅极线与数据线在栅极线与数据线之间重叠的区域。

    Thin film transistor array substrate and manufacturing method thereof

    公开(公告)号:US10355025B2

    公开(公告)日:2019-07-16

    申请号:US15813758

    申请日:2017-11-15

    摘要: A substrate including gate wirings including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate wirings and the oxide semiconductor layer pattern, data wirings including a data line crossing the gate line, a source electrode connected to one side of the oxide semiconductor layer pattern, and a drain electrode connected to another side of the oxide semiconductor layer, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

    Thin film transistor array substrate and manufacturing method thereof
    9.
    发明授权
    Thin film transistor array substrate and manufacturing method thereof 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号:US09520419B2

    公开(公告)日:2016-12-13

    申请号:US14793183

    申请日:2015-07-07

    IPC分类号: H01L27/12 H01L29/786

    摘要: A method of manufacturing a thin film transistor (TFT) array substrate includes forming a gate line and a gate electrode on a substrate, forming a gate-insulating layer and an oxide semiconductor layer on the gate line and the gate electrode, forming etch stop patterns at a thin-film transistor area and an area where the gate line and the data line overlap each other, forming a data conductor on the oxide semiconductor layer and the etch stop patterns, the data conductor comprising a source electrode and a drain electrode that constitute a TFT together with the gate electrode, and forming a data line extending in a direction intersecting the gate line.

    摘要翻译: 制造薄膜晶体管(TFT)阵列基板的方法包括在基板上形成栅极线和栅电极,在栅极线和栅电极上形成栅极绝缘层和氧化物半导体层,形成蚀刻停止图案 在薄膜晶体管区域和栅极线和数据线彼此重叠的区域中,在氧化物半导体层和蚀刻停止图案上形成数据导体,数据导体包括源电极和漏极,构成 TFT与栅极电极一起形成,并且在与栅极线相交的方向上形成数据线。

    Thin film transistor array substrate and manufacturing method thereof

    公开(公告)号:US10896920B2

    公开(公告)日:2021-01-19

    申请号:US16438385

    申请日:2019-06-11

    摘要: A substrate including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a source electrode electrically connected to the oxide semiconductor layer pattern, a drain electrode electrically connected to the oxide semiconductor layer, the drain electrode spaced apart from the source electrode, and an insulating pattern including a first portion, which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.